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addressing pr comments
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13 files changed

+73
-89
lines changed

13 files changed

+73
-89
lines changed

‎clang/lib/CodeGen/CGBuiltin.cpp‎

Lines changed: 16 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -104,6 +104,7 @@ static Value *handleHlslClip(const CallExpr *E, CodeGenFunction *CGF) {
104104

105105
Constant *FZeroConst = ConstantFP::getZero(CGF->FloatTy);
106106
Value *CMP;
107+
Value *LastInstr;
107108

108109
if (const auto *VecTy = E->getArg(0)->getType()->getAs<clang::VectorType>()) {
109110
FZeroConst = ConstantVector::getSplat(
@@ -116,23 +117,27 @@ static Value *handleHlslClip(const CallExpr *E, CodeGenFunction *CGF) {
116117
CMP = CGF->Builder.CreateFCmpOLT(Op0, FZeroConst);
117118

118119
if (CGF->CGM.getTarget().getTriple().isDXIL())
119-
return CGF->Builder.CreateIntrinsic(CGF->VoidTy, llvm::Intrinsic::dx_clip,
120-
{CMP}, nullptr);
120+
LastInstr = CGF->Builder.CreateIntrinsic(
121+
CGF->VoidTy, llvm::Intrinsic::dx_discard, {CMP}, nullptr);
122+
else if (CGF->CGM.getTarget().getTriple().isSPIRV()) {
123+
BasicBlock *LT0 = CGF->createBasicBlock("lt0", CGF->CurFn);
124+
BasicBlock *End = CGF->createBasicBlock("end", CGF->CurFn);
121125

122-
BasicBlock *LT0 = CGF->createBasicBlock("lt0", CGF->CurFn);
123-
BasicBlock *End = CGF->createBasicBlock("end", CGF->CurFn);
126+
CGF->Builder.CreateCondBr(CMP, LT0, End);
124127

125-
CGF->Builder.CreateCondBr(CMP, LT0, End);
128+
CGF->Builder.SetInsertPoint(LT0);
126129

127-
CGF->Builder.SetInsertPoint(LT0);
130+
CGF->Builder.CreateIntrinsic(CGF->VoidTy, llvm::Intrinsic::spv_discard, {},
131+
nullptr);
128132

129-
CGF->Builder.CreateIntrinsic(CGF->VoidTy, llvm::Intrinsic::spv_clip, {},
130-
nullptr);
133+
LastInstr = CGF->Builder.CreateBr(End);
131134

132-
auto *BrCall = CGF->Builder.CreateBr(End);
135+
CGF->Builder.SetInsertPoint(End);
136+
} else {
137+
llvm_unreachable("Backend Codegen not supported.");
138+
}
133139

134-
CGF->Builder.SetInsertPoint(End);
135-
return BrCall;
140+
return LastInstr;
136141
}
137142

138143
static Value *handleHlslSplitdouble(const CallExpr *E, CodeGenFunction *CGF) {

‎clang/lib/CodeGen/CGHLSLRuntime.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,6 @@ class CGHLSLRuntime {
9494
GENERATE_HLSL_INTRINSIC_FUNCTION(WaveActiveCountBits, wave_active_countbits)
9595
GENERATE_HLSL_INTRINSIC_FUNCTION(WaveIsFirstLane, wave_is_first_lane)
9696
GENERATE_HLSL_INTRINSIC_FUNCTION(WaveReadLaneAt, wave_readlane)
97-
GENERATE_HLSL_INTRINSIC_FUNCTION(Clip, clip)
9897
GENERATE_HLSL_INTRINSIC_FUNCTION(FirstBitUHigh, firstbituhigh)
9998
GENERATE_HLSL_INTRINSIC_FUNCTION(FirstBitSHigh, firstbitshigh)
10099
GENERATE_HLSL_INTRINSIC_FUNCTION(NClamp, nclamp)

‎clang/test/CodeGenHLSL/builtins/clip.hlsl‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -7,15 +7,15 @@ void test_scalar(float Buf) {
77
// CHECK: [[LOAD:%.*]] = load float, ptr [[VALP]].addr, align 4
88
// CHECK-NEXT: [[FCMP:%.*]] = fcmp olt float [[LOAD]], 0.000000e+00
99
// CHECK-NO: call i1 @llvm.dx.any
10-
// CHECK-NEXT: call void @llvm.dx.clip(i1 [[FCMP]])
10+
// CHECK-NEXT: call void @llvm.dx.discard(i1 [[FCMP]])
1111
//
1212
// SPIRV: define spir_func void @{{.*}}test_scalar{{.*}}(float {{.*}} [[VALP:%.*]])
1313
// SPIRV: [[LOAD:%.*]] = load float, ptr [[VALP]].addr, align 4
1414
// SPIRV-NEXT: [[FCMP:%.*]] = fcmp olt float [[LOAD]], 0.000000e+00
15-
// SPIRV-NO: call i1 @llvm.dx.any
15+
// SPIRV-NO: call i1 @llvm.spv.any
1616
// SPIRV-NEXT: br i1 [[FCMP]], label %[[LTL:.*]], label %[[ENDL:.*]]
1717
// SPIRV: [[LTL]]: ; preds = %entry
18-
// SPIRV-NEXT: call void @llvm.spv.clip()
18+
// SPIRV-NEXT: call void @llvm.spv.discard()
1919
// SPIRV: br label %[[ENDL]]
2020
clip(Buf);
2121
}
@@ -25,15 +25,15 @@ void test_vector4(float4 Buf) {
2525
// CHECK: [[LOAD:%.*]] = load <4 x float>, ptr [[VALP]].addr, align 16
2626
// CHECK-NEXT: [[FCMP:%.*]] = fcmp olt <4 x float> [[LOAD]], zeroinitializer
2727
// CHECK-NEXT: [[ANYC:%.*]] = call i1 @llvm.dx.any.v4i1(<4 x i1> [[FCMP]])
28-
// CHECK-NEXT: call void @llvm.dx.clip(i1 [[ANYC]])
28+
// CHECK-NEXT: call void @llvm.dx.discard(i1 [[ANYC]])
2929
//
3030
// SPIRV: define spir_func void @{{.*}}test_vector{{.*}}(<4 x float> {{.*}} [[VALP:%.*]])
3131
// SPIRV: [[LOAD:%.*]] = load <4 x float>, ptr [[VALP]].addr, align 16
3232
// SPIRV-NEXT: [[FCMP:%.*]] = fcmp olt <4 x float> [[LOAD]], zeroinitializer
3333
// SPIRV-NEXT: [[ANYC:%.*]] = call i1 @llvm.spv.any.v4i1(<4 x i1> [[FCMP]])
3434
// SPIRV-NEXT: br i1 [[ANYC]], label %[[LTL:.*]], label %[[ENDL:.*]]
3535
// SPIRV: [[LTL]]: ; preds = %entry
36-
// SPIRV-NEXT: call void @llvm.spv.clip()
36+
// SPIRV-NEXT: call void @llvm.spv.discard()
3737
// SPIRV-NEXT: br label %[[ENDL]]
3838
clip(Buf);
3939
}

‎llvm/docs/SPIRVUsage.rst‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -149,6 +149,8 @@ list of supported SPIR-V extensions, sorted alphabetically by their extension na
149149
- Adds atomic min and max instruction on floating-point numbers.
150150
* - ``SPV_EXT_arithmetic_fence``
151151
- Adds an instruction that prevents fast-math optimizations between its argument and the expression that contains it.
152+
* - ``SPV_EXT_demote_to_helper_invocation``
153+
- Adds an instruction that demotes a fragment shader invocation to a helper invocation.
152154
* - ``SPV_INTEL_arbitrary_precision_integers``
153155
- Allows generating arbitrary width integer types.
154156
* - ``SPV_INTEL_bfloat16_conversion``

‎llvm/include/llvm/IR/IntrinsicsDirectX.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ def int_dx_step : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty, L
9999
def int_dx_splitdouble : DefaultAttrsIntrinsic<[llvm_anyint_ty, LLVMMatchType<0>],
100100
[LLVMScalarOrSameVectorWidth<0, llvm_double_ty>], [IntrNoMem]>;
101101
def int_dx_radians : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
102-
def int_dx_clip : DefaultAttrsIntrinsic<[], [llvm_i1_ty], [IntrNoMem]>;
102+
def int_dx_discard : DefaultAttrsIntrinsic<[], [llvm_i1_ty], []>;
103103
def int_dx_firstbituhigh : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_anyint_ty], [IntrNoMem]>;
104104
def int_dx_firstbitshigh : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_anyint_ty], [IntrNoMem]>;
105105
}

‎llvm/include/llvm/IR/IntrinsicsSPIRV.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ let TargetPrefix = "spv" in {
9191
def int_spv_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;
9292
def int_spv_radians : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty], [IntrNoMem]>;
9393
def int_spv_group_memory_barrier_with_group_sync : DefaultAttrsIntrinsic<[], [], []>;
94-
def int_spv_clip : DefaultAttrsIntrinsic<[], [llvm_i1_ty], [IntrNoMem]>;
94+
def int_spv_discard : DefaultAttrsIntrinsic<[], [], []>;
9595
def int_spv_uclamp : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
9696
def int_spv_sclamp : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
9797
def int_spv_nclamp : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;

‎llvm/lib/Target/DirectX/DXIL.td‎

Lines changed: 5 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -772,7 +772,7 @@ def CheckAccessFullyMapped : DXILOp<71, checkAccessFullyMapped> {
772772

773773
def Discard : DXILOp<82, discard> {
774774
let Doc = "discard the current pixel";
775-
let LLVMIntrinsic = int_dx_clip;
775+
let LLVMIntrinsic = int_dx_discard;
776776
let arguments = [Int1Ty];
777777
let result = VoidTy;
778778
let stages = [Stages<DXIL1_0, [pixel]>];
@@ -871,15 +871,6 @@ def WaveIsFirstLane : DXILOp<110, waveIsFirstLane> {
871871
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
872872
}
873873

874-
def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
875-
let Doc = "returns the index of the current lane in the wave";
876-
let LLVMIntrinsic = int_dx_wave_getlaneindex;
877-
let arguments = [];
878-
let result = Int32Ty;
879-
let stages = [Stages<DXIL1_0, [all_stages]>];
880-
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
881-
}
882-
883874
def WaveReadLaneAt: DXILOp<117, waveReadLaneAt> {
884875
let Doc = "returns the value from the specified lane";
885876
let LLVMIntrinsic = int_dx_wave_readlane;
@@ -890,24 +881,10 @@ def WaveReadLaneAt: DXILOp<117, waveReadLaneAt> {
890881
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
891882
}
892883

893-
def AnnotateHandle : DXILOp<217, annotateHandle> {
894-
let Doc = "annotate handle with resource properties";
895-
let arguments = [HandleTy, ResPropsTy];
896-
let result = HandleTy;
897-
let stages = [Stages<DXIL1_6, [all_stages]>];
898-
}
899-
900-
def CreateHandleFromBinding : DXILOp<218, createHandleFromBinding> {
901-
let Doc = "create resource handle from binding";
902-
let arguments = [ResBindTy, Int32Ty, Int1Ty];
903-
let result = HandleTy;
904-
let stages = [Stages<DXIL1_6, [all_stages]>];
905-
}
906-
907-
def WaveAllBitCount : DXILOp<135, waveAllOp> {
908-
let Doc = "returns the count of bits set to 1 across the wave";
909-
let LLVMIntrinsic = int_dx_wave_active_countbits;
910-
let arguments = [Int1Ty];
884+
def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
885+
let Doc = "returns the index of the current lane in the wave";
886+
let LLVMIntrinsic = int_dx_wave_getlaneindex;
887+
let arguments = [];
911888
let result = Int32Ty;
912889
let stages = [Stages<DXIL1_0, [all_stages]>];
913890
let attributes = [Attributes<DXIL1_0, [ReadNone]>];

‎llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,8 @@ static const std::map<std::string, SPIRV::Extension::Extension>
3030
SPIRV::Extension::Extension::SPV_EXT_shader_atomic_float_min_max},
3131
{"SPV_EXT_arithmetic_fence",
3232
SPIRV::Extension::Extension::SPV_EXT_arithmetic_fence},
33+
{"SPV_EXT_demote_to_helper_invocation",
34+
SPIRV::Extension::Extension::SPV_EXT_demote_to_helper_invocation},
3335
{"SPV_INTEL_arbitrary_precision_integers",
3436
SPIRV::Extension::Extension::SPV_INTEL_arbitrary_precision_integers},
3537
{"SPV_INTEL_cache_controls",
@@ -75,9 +77,7 @@ static const std::map<std::string, SPIRV::Extension::Extension>
7577
{"SPV_KHR_cooperative_matrix",
7678
SPIRV::Extension::Extension::SPV_KHR_cooperative_matrix},
7779
{"SPV_KHR_non_semantic_info",
78-
SPIRV::Extension::Extension::SPV_KHR_non_semantic_info},
79-
{"SPV_EXT_demote_to_helper_invocation",
80-
SPIRV::Extension::Extension::SPV_EXT_demote_to_helper_invocation}};
80+
SPIRV::Extension::Extension::SPV_KHR_non_semantic_info}};
8181

8282
bool SPIRVExtensionsParser::parse(cl::Option &O, llvm::StringRef ArgName,
8383
llvm::StringRef ArgValue,

‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp‎

Lines changed: 10 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -164,8 +164,8 @@ class SPIRVInstructionSelector : public InstructionSelector {
164164
unsigned comparisonOpcode, MachineInstr &I) const;
165165
bool selectCross(Register ResVReg, const SPIRVType *ResType,
166166
MachineInstr &I) const;
167-
bool selectClip(Register ResVReg, const SPIRVType *ResType,
168-
MachineInstr &I) const;
167+
bool selectDiscard(Register ResVReg, const SPIRVType *ResType,
168+
MachineInstr &I) const;
169169

170170
bool selectICmp(Register ResVReg, const SPIRVType *ResType,
171171
MachineInstr &I) const;
@@ -2157,19 +2157,15 @@ bool SPIRVInstructionSelector::selectSplatVector(Register ResVReg,
21572157
return MIB.constrainAllUses(TII, TRI, RBI);
21582158
}
21592159

2160-
bool SPIRVInstructionSelector::selectClip(Register ResVReg,
2161-
const SPIRVType *ResType,
2162-
MachineInstr &I) const {
2160+
bool SPIRVInstructionSelector::selectDiscard(Register ResVReg,
2161+
const SPIRVType *ResType,
2162+
MachineInstr &I) const {
21632163

21642164
unsigned Opcode;
21652165

2166-
if (STI.isAtLeastSPIRVVer(VersionTuple(1, 6))) {
2167-
if (!STI.canUseExtension(
2168-
SPIRV::Extension::SPV_EXT_demote_to_helper_invocation))
2169-
report_fatal_error(
2170-
"llvm.spv.clip intrinsic: this instruction requires the following "
2171-
"SPIR-V extension: SPV_EXT_demote_to_helper_invocation",
2172-
false);
2166+
if (STI.canUseExtension(
2167+
SPIRV::Extension::SPV_EXT_demote_to_helper_invocation) ||
2168+
STI.isAtLeastSPIRVVer(llvm::VersionTuple(1, 6))) {
21732169
Opcode = SPIRV::OpDemoteToHelperInvocation;
21742170
} else {
21752171
Opcode = SPIRV::OpKill;
@@ -2838,8 +2834,8 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
28382834
selectHandleFromBinding(ResVReg, ResType, I);
28392835
return true;
28402836
}
2841-
case Intrinsic::spv_clip: {
2842-
return selectClip(ResVReg, ResType, I);
2837+
case Intrinsic::spv_discard: {
2838+
return selectDiscard(ResVReg, ResType, I);
28432839
}
28442840
default: {
28452841
std::string DiagMsg;

‎llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp‎

Lines changed: 11 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -633,7 +633,8 @@ void RequirementHandler::initAvailableCapabilities(const SPIRVSubtarget &ST) {
633633
if (ST.isAtLeastSPIRVVer(VersionTuple(1, 6)))
634634
addAvailableCaps({Capability::DotProduct, Capability::DotProductInputAll,
635635
Capability::DotProductInput4x8Bit,
636-
Capability::DotProductInput4x8BitPacked});
636+
Capability::DotProductInput4x8BitPacked,
637+
Capability::DemoteToHelperInvocation});
637638

638639
// Add capabilities enabled by extensions.
639640
for (auto Extension : ST.getAllAvailableExtensions()) {
@@ -1407,21 +1408,23 @@ void addInstrRequirements(const MachineInstr &MI,
14071408
Reqs.addCapability(SPIRV::Capability::SplitBarrierINTEL);
14081409
}
14091410
break;
1410-
case SPIRV::OpSDot:
1411-
case SPIRV::OpUDot:
1412-
AddDotProductRequirements(MI, Reqs, ST);
1413-
break;
1414-
14151411
case SPIRV::OpKill: {
14161412
Reqs.addCapability(SPIRV::Capability::Shader);
14171413
} break;
14181414
case SPIRV::OpDemoteToHelperInvocation:
1415+
Reqs.addCapability(SPIRV::Capability::DemoteToHelperInvocation);
1416+
14191417
if (ST.canUseExtension(
14201418
SPIRV::Extension::SPV_EXT_demote_to_helper_invocation)) {
1421-
Reqs.addExtension(SPIRV::Extension::SPV_EXT_demote_to_helper_invocation);
1422-
Reqs.addCapability(SPIRV::Capability::DemoteToHelperInvocation);
1419+
if (!ST.isAtLeastSPIRVVer(llvm::VersionTuple(1, 6)))
1420+
Reqs.addExtension(
1421+
SPIRV::Extension::SPV_EXT_demote_to_helper_invocation);
14231422
}
14241423
break;
1424+
case SPIRV::OpSDot:
1425+
case SPIRV::OpUDot:
1426+
AddDotProductRequirements(MI, Reqs, ST);
1427+
break;
14251428
default:
14261429
break;
14271430
}

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