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[MLIR][OPENMP] Relax requirement about branches as terminator of private alloc
Fixes #126966
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2 files changed

+45
-6
lines changed

2 files changed

+45
-6
lines changed

mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1420,20 +1420,19 @@ allocatePrivateVars(llvm::IRBuilderBase &builder,
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const llvm::OpenMPIRBuilder::InsertPointTy &allocaIP,
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llvm::DenseMap<Value, Value> *mappedPrivateVars = nullptr) {
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// Allocate private vars
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llvm::BranchInst *allocaTerminator =
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llvm::cast<llvm::BranchInst>(allocaIP.getBlock()->getTerminator());
1423+
llvm::Instruction *allocaTerminator = allocaIP.getBlock()->getTerminator();
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splitBB(llvm::OpenMPIRBuilder::InsertPointTy(allocaIP.getBlock(),
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allocaTerminator->getIterator()),
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true, allocaTerminator->getStableDebugLoc(),
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"omp.region.after_alloca");
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llvm::IRBuilderBase::InsertPointGuard guard(builder);
1431-
// Update the allocaTerminator in case the alloca block was split above.
1432-
allocaTerminator =
1433-
llvm::cast<llvm::BranchInst>(allocaIP.getBlock()->getTerminator());
1430+
// Update the allocaTerminator since the alloca block was split above.
1431+
allocaTerminator = allocaIP.getBlock()->getTerminator();
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builder.SetInsertPoint(allocaTerminator);
1433+
// The new terminator is an uncondition branch created by the splitBB above.
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assert(allocaTerminator->getNumSuccessors() == 1 &&
1436-
"This is an unconditional branch created by OpenMPIRBuilder");
1435+
"This is an unconditional branch created by splitBB");
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llvm::BasicBlock *afterAllocas = allocaTerminator->getSuccessor(0);
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mlir/test/Target/LLVMIR/openmp-private.mlir

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -265,3 +265,43 @@ omp.private {type = firstprivate} @_QFequivalenceEx_firstprivate_ptr_f32 : f32 c
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// CHECK: store float %[[HOST_VAL]], ptr %[[PRIV_ALLOC]], align 4
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// Test that we inlined the body of the parallel region.
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// CHECK: store float 0x{{.*}}, ptr %[[PRIV_ALLOC]], align 4
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// -----
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omp.private {type = private} @_QFEi_private_i32 : i32
272+
llvm.func @_QPprivate_alloc_with_switch() {
273+
%0 = llvm.mlir.constant(1 : i32) : i32
274+
%1 = llvm.mlir.constant(30 : i32) : i32
275+
%2 = llvm.mlir.constant(1 : i64) : i64
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%3 = llvm.alloca %2 x i32 {bindc_name = "n"} : (i64) -> !llvm.ptr
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%4 = llvm.alloca %2 x i32 {bindc_name = "i"} : (i64) -> !llvm.ptr
278+
llvm.store %0, %3 : i32, !llvm.ptr
279+
%5 = llvm.load %3 : !llvm.ptr -> i32
280+
llvm.switch %5 : i32, ^bb1 [
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1: ^bb1,
282+
2: ^bb2
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]
284+
^bb1: // 2 preds: ^bb0, ^bb0
285+
omp.simd private(@_QFEi_private_i32 %4 -> %arg0 : !llvm.ptr) {
286+
omp.loop_nest (%arg1) : i32 = (%0) to (%1) inclusive step (%0) {
287+
llvm.store %arg1, %arg0 : i32, !llvm.ptr
288+
omp.yield
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}
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}
291+
llvm.br ^bb2
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^bb2: // 2 preds: ^bb0, ^bb1
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llvm.return
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}
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296+
// CHECK-LABEL: define void @_QPprivate_alloc_with_switch() {
297+
// CHECK: br label %[[AFTER_ALLOCA_BLOCK:.*]]
298+
// CHECK: [[AFTER_ALLOCA_BLOCK]]:
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// CHECK: switch i32 %{{.*}}, label %[[PRIVATE_INIT_BLOCK:.*]] [
300+
// CHECK: i32 1, label %[[PRIVATE_INIT_BLOCK]]
301+
// CHECK: i32 2, label %[[EXIT_BLOCK:.*]]
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// CHECK: ]
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// CHECK: [[PRIVATE_INIT_BLOCK]]:
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// CHECK: omp.private.init:
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// CHECK: omp.simd.region:
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// CHECK: [[EXIT_BLOCK]]:
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// CHECK: ret void

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