Modified: Updated testcases checks for disassembly as be base instruction

Author: lakshayk-nv

llvm/test/tools/llvm-exegesis/AArch64/setReg_init_check.s

@@ -9,19 +9,19 @@ PPR-NOT: setRegTo is not implemented, results will be unreliable
 PPR: assembled_snippet: {{.*}}C0035FD6
 PPR_ASM: {{<foo>:}}
 PPR_ASM: ptrue p{{[0-9]+}}.b
-PPR_ASM-NEXT: dupm z{{[0-9]+}}.s, #0x1
+PPR_ASM-NEXT: mov z{{[0-9]+}}.d, #0x0
 PPR_ASM-NEXT: faddv d{{[0-9]+}}, p{{[0-9]+}}, z{{[0-9]+}}
 
 ## ZPR Register Class Initialization Testcase
-## Ideally, we should use PTRUE_{B/H/S/D} instead of FADDV_VPZ_D for an isolated test case; however, Exegesis does not yet support PTRUE_{B/H/S/D}.
+## Ideally, we should use DUP_ZI_{B/H/S/D} instead of FADDV_VPZ_D for an isolated test case; however, Exegesis does not yet support DUP_ZI_{B/H/S/D}.
 RUN: llvm-exegesis -mcpu=neoverse-v2 -mode=latency --dump-object-to-disk=%d --opcode-name=FADDV_VPZ_D 2>&1 | FileCheck %s --check-prefix=ZPR
 RUN: llvm-objdump -d %d > %t.s
 RUN: FileCheck %s --check-prefix=ZPR_ASM < %t.s
 ZPR-NOT: setRegTo is not implemented, results will be unreliable
 ZPR: assembled_snippet: {{.*}}C0035FD6
 ZPR_ASM: {{<foo>:}}
 ZPR_ASM: ptrue p{{[0-9]+}}.b
-ZPR_ASM-NEXT: dupm z{{[0-9]+}}.s, #0x1
+ZPR_ASM-NEXT: mov z{{[0-9]+}}.d, #0x0
 ZPR_ASM-NEXT: faddv d{{[0-9]+}}, p{{[0-9]+}}, z{{[0-9]+}}
 
 ## FPR128 Register Class Initialization Testcase
@@ -41,5 +41,6 @@ RUN: FileCheck %s --check-prefix=FPR64-ASM < %t.s
 FPR64-NOT: setRegTo is not implemented, results will be unreliable
 FPR64: assembled_snippet: {{.*}}C0035FD6
 FPR64-ASM: {{<foo>:}}
-FPR64-ASM: fmov d{{[0-9]+}}, {{#2.0+|#2\.000000000000000000e\+00}}
+## For FMOVDi base-instruction : fmov d{{[0-9]+}}, {{#2.0+|#2\.000000000000000000e\+00}}
+FPR64-ASM: movi d{{[0-9]+}}, #0000000000000000
 FPR64-ASM-NEXT: addv h{{[0-9]+}}, v{{[0-9]+}}.4h