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NVPTX
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+118
-175
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6 files changed

+118
-175
lines changed

‎llvm/lib/Target/NVPTX/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@ tablegen(LLVM NVPTXGenAsmWriter.inc -gen-asm-writer)
66
tablegen(LLVM NVPTXGenDAGISel.inc -gen-dag-isel)
77
tablegen(LLVM NVPTXGenInstrInfo.inc -gen-instr-info)
88
tablegen(LLVM NVPTXGenRegisterInfo.inc -gen-register-info)
9+
tablegen(LLVM NVPTXGenSDNodeInfo.inc -gen-sd-node-info)
910
tablegen(LLVM NVPTXGenSubtargetInfo.inc -gen-subtarget)
1011

1112
add_public_tablegen_target(NVPTXCommonTableGen)

‎llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include "NVPTX.h"
1818
#include "NVPTXISelLowering.h"
1919
#include "NVPTXRegisterInfo.h"
20+
#include "NVPTXSelectionDAGInfo.h"
2021
#include "NVPTXTargetMachine.h"
2122
#include "llvm/ADT/MapVector.h"
2223
#include "llvm/CodeGen/SelectionDAGISel.h"

‎llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp‎

Lines changed: 4 additions & 85 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#include "NVPTXISelLowering.h"
1515
#include "MCTargetDesc/NVPTXBaseInfo.h"
1616
#include "NVPTX.h"
17+
#include "NVPTXSelectionDAGInfo.h"
1718
#include "NVPTXSubtarget.h"
1819
#include "NVPTXTargetMachine.h"
1920
#include "NVPTXTargetObjectFile.h"
@@ -1043,88 +1044,6 @@ NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM,
10431044
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
10441045
}
10451046

1046-
const char *NVPTXTargetLowering::getTargetNodeName(unsigned Opcode) const {
1047-
1048-
#define MAKE_CASE(V) \
1049-
case V: \
1050-
return #V;
1051-
1052-
switch ((NVPTXISD::NodeType)Opcode) {
1053-
case NVPTXISD::FIRST_NUMBER:
1054-
break;
1055-
1056-
MAKE_CASE(NVPTXISD::CALL)
1057-
MAKE_CASE(NVPTXISD::RET_GLUE)
1058-
MAKE_CASE(NVPTXISD::LOAD_PARAM)
1059-
MAKE_CASE(NVPTXISD::Wrapper)
1060-
MAKE_CASE(NVPTXISD::DeclareParam)
1061-
MAKE_CASE(NVPTXISD::DeclareScalarParam)
1062-
MAKE_CASE(NVPTXISD::DeclareRet)
1063-
MAKE_CASE(NVPTXISD::DeclareScalarRet)
1064-
MAKE_CASE(NVPTXISD::DeclareRetParam)
1065-
MAKE_CASE(NVPTXISD::PrintCall)
1066-
MAKE_CASE(NVPTXISD::PrintConvergentCall)
1067-
MAKE_CASE(NVPTXISD::PrintCallUni)
1068-
MAKE_CASE(NVPTXISD::PrintConvergentCallUni)
1069-
MAKE_CASE(NVPTXISD::LoadParam)
1070-
MAKE_CASE(NVPTXISD::LoadParamV2)
1071-
MAKE_CASE(NVPTXISD::LoadParamV4)
1072-
MAKE_CASE(NVPTXISD::StoreParam)
1073-
MAKE_CASE(NVPTXISD::StoreParamV2)
1074-
MAKE_CASE(NVPTXISD::StoreParamV4)
1075-
MAKE_CASE(NVPTXISD::StoreParamS32)
1076-
MAKE_CASE(NVPTXISD::StoreParamU32)
1077-
MAKE_CASE(NVPTXISD::CallArgBegin)
1078-
MAKE_CASE(NVPTXISD::CallArg)
1079-
MAKE_CASE(NVPTXISD::LastCallArg)
1080-
MAKE_CASE(NVPTXISD::CallArgEnd)
1081-
MAKE_CASE(NVPTXISD::CallVoid)
1082-
MAKE_CASE(NVPTXISD::CallVal)
1083-
MAKE_CASE(NVPTXISD::CallSymbol)
1084-
MAKE_CASE(NVPTXISD::Prototype)
1085-
MAKE_CASE(NVPTXISD::MoveParam)
1086-
MAKE_CASE(NVPTXISD::StoreRetval)
1087-
MAKE_CASE(NVPTXISD::StoreRetvalV2)
1088-
MAKE_CASE(NVPTXISD::StoreRetvalV4)
1089-
MAKE_CASE(NVPTXISD::PseudoUseParam)
1090-
MAKE_CASE(NVPTXISD::UNPACK_VECTOR)
1091-
MAKE_CASE(NVPTXISD::BUILD_VECTOR)
1092-
MAKE_CASE(NVPTXISD::RETURN)
1093-
MAKE_CASE(NVPTXISD::CallSeqBegin)
1094-
MAKE_CASE(NVPTXISD::CallSeqEnd)
1095-
MAKE_CASE(NVPTXISD::CallPrototype)
1096-
MAKE_CASE(NVPTXISD::ProxyReg)
1097-
MAKE_CASE(NVPTXISD::LoadV2)
1098-
MAKE_CASE(NVPTXISD::LoadV4)
1099-
MAKE_CASE(NVPTXISD::LoadV8)
1100-
MAKE_CASE(NVPTXISD::LDUV2)
1101-
MAKE_CASE(NVPTXISD::LDUV4)
1102-
MAKE_CASE(NVPTXISD::StoreV2)
1103-
MAKE_CASE(NVPTXISD::StoreV4)
1104-
MAKE_CASE(NVPTXISD::StoreV8)
1105-
MAKE_CASE(NVPTXISD::FSHL_CLAMP)
1106-
MAKE_CASE(NVPTXISD::FSHR_CLAMP)
1107-
MAKE_CASE(NVPTXISD::BFE)
1108-
MAKE_CASE(NVPTXISD::BFI)
1109-
MAKE_CASE(NVPTXISD::PRMT)
1110-
MAKE_CASE(NVPTXISD::FCOPYSIGN)
1111-
MAKE_CASE(NVPTXISD::DYNAMIC_STACKALLOC)
1112-
MAKE_CASE(NVPTXISD::STACKRESTORE)
1113-
MAKE_CASE(NVPTXISD::STACKSAVE)
1114-
MAKE_CASE(NVPTXISD::SETP_F16X2)
1115-
MAKE_CASE(NVPTXISD::SETP_BF16X2)
1116-
MAKE_CASE(NVPTXISD::Dummy)
1117-
MAKE_CASE(NVPTXISD::MUL_WIDE_SIGNED)
1118-
MAKE_CASE(NVPTXISD::MUL_WIDE_UNSIGNED)
1119-
MAKE_CASE(NVPTXISD::BrxEnd)
1120-
MAKE_CASE(NVPTXISD::BrxItem)
1121-
MAKE_CASE(NVPTXISD::BrxStart)
1122-
}
1123-
return nullptr;
1124-
1125-
#undef MAKE_CASE
1126-
}
1127-
11281047
TargetLoweringBase::LegalizeTypeAction
11291048
NVPTXTargetLowering::getPreferredVectorAction(MVT VT) const {
11301049
if (!VT.isScalableVector() && VT.getVectorNumElements() != 1 &&
@@ -1688,7 +1607,7 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
16881607

16891608
if (VectorInfo[J] & PVF_LAST) {
16901609
const unsigned NumElts = StoreOperands.size() - 3;
1691-
NVPTXISD::NodeType Op;
1610+
unsigned Op;
16921611
switch (NumElts) {
16931612
case 1:
16941613
Op = NVPTXISD::StoreParam;
@@ -1978,7 +1897,7 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
19781897
unsigned NumElts = LoadVTs.size();
19791898
LoadVTs.push_back(MVT::Other);
19801899
LoadVTs.push_back(MVT::Glue);
1981-
NVPTXISD::NodeType Op;
1900+
unsigned Op;
19821901
switch (NumElts) {
19831902
case 1:
19841903
Op = NVPTXISD::LoadParam;
@@ -3684,7 +3603,7 @@ NVPTXTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
36843603

36853604
// That's the last element of this store op.
36863605
if (VectorInfo[i] & PVF_LAST) {
3687-
NVPTXISD::NodeType Op;
3606+
unsigned Op;
36883607
unsigned NumElts = StoreOperands.size() - 2;
36893608
switch (NumElts) {
36903609
case 1:

‎llvm/lib/Target/NVPTX/NVPTXISelLowering.h‎

Lines changed: 0 additions & 86 deletions
Original file line numberDiff line numberDiff line change
@@ -20,90 +20,6 @@
2020
#include "llvm/Support/AtomicOrdering.h"
2121

2222
namespace llvm {
23-
namespace NVPTXISD {
24-
enum NodeType : unsigned {
25-
// Start the numbering from where ISD NodeType finishes.
26-
FIRST_NUMBER = ISD::BUILTIN_OP_END,
27-
Wrapper,
28-
CALL,
29-
RET_GLUE,
30-
LOAD_PARAM,
31-
DeclareParam,
32-
DeclareScalarParam,
33-
DeclareRetParam,
34-
DeclareRet,
35-
DeclareScalarRet,
36-
PrintCall,
37-
PrintConvergentCall,
38-
PrintCallUni,
39-
PrintConvergentCallUni,
40-
CallArgBegin,
41-
CallArg,
42-
LastCallArg,
43-
CallArgEnd,
44-
CallVoid,
45-
CallVal,
46-
CallSymbol,
47-
Prototype,
48-
MoveParam,
49-
PseudoUseParam,
50-
RETURN,
51-
CallSeqBegin,
52-
CallSeqEnd,
53-
CallPrototype,
54-
ProxyReg,
55-
FSHL_CLAMP,
56-
FSHR_CLAMP,
57-
MUL_WIDE_SIGNED,
58-
MUL_WIDE_UNSIGNED,
59-
SETP_F16X2,
60-
SETP_BF16X2,
61-
BFE,
62-
BFI,
63-
PRMT,
64-
65-
/// This node is similar to ISD::BUILD_VECTOR except that the output may be
66-
/// implicitly bitcast to a scalar. This allows for the representation of
67-
/// packing move instructions for vector types which are not legal i.e. v2i32
68-
BUILD_VECTOR,
69-
70-
/// This node is the inverse of NVPTX::BUILD_VECTOR. It takes a single value
71-
/// which may be a scalar and unpacks it into multiple values by implicitly
72-
/// converting it to a vector.
73-
UNPACK_VECTOR,
74-
75-
FCOPYSIGN,
76-
DYNAMIC_STACKALLOC,
77-
STACKRESTORE,
78-
STACKSAVE,
79-
BrxStart,
80-
BrxItem,
81-
BrxEnd,
82-
Dummy,
83-
84-
FIRST_MEMORY_OPCODE,
85-
LoadV2 = FIRST_MEMORY_OPCODE,
86-
LoadV4,
87-
LoadV8,
88-
LDUV2, // LDU.v2
89-
LDUV4, // LDU.v4
90-
StoreV2,
91-
StoreV4,
92-
StoreV8,
93-
LoadParam,
94-
LoadParamV2,
95-
LoadParamV4,
96-
StoreParam,
97-
StoreParamV2,
98-
StoreParamV4,
99-
StoreParamS32, // to sext and store a <32bit value, not used currently
100-
StoreParamU32, // to zext and store a <32bit value, not used currently
101-
StoreRetval,
102-
StoreRetvalV2,
103-
StoreRetvalV4,
104-
LAST_MEMORY_OPCODE = StoreRetvalV4,
105-
};
106-
}
10723

10824
class NVPTXSubtarget;
10925

@@ -118,8 +34,6 @@ class NVPTXTargetLowering : public TargetLowering {
11834

11935
SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
12036

121-
const char *getTargetNodeName(unsigned Opcode) const override;
122-
12337
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
12438
MachineFunction &MF,
12539
unsigned Intrinsic) const override;

‎llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.cpp‎

Lines changed: 75 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -7,13 +7,85 @@
77
//===----------------------------------------------------------------------===//
88

99
#include "NVPTXSelectionDAGInfo.h"
10-
#include "NVPTXISelLowering.h"
10+
11+
#define GET_SDNODE_DESC
12+
#include "NVPTXGenSDNodeInfo.inc"
1113

1214
using namespace llvm;
1315

16+
NVPTXSelectionDAGInfo::NVPTXSelectionDAGInfo()
17+
: SelectionDAGGenTargetInfo(NVPTXGenSDNodeInfo) {}
18+
1419
NVPTXSelectionDAGInfo::~NVPTXSelectionDAGInfo() = default;
1520

21+
const char *NVPTXSelectionDAGInfo::getTargetNodeName(unsigned Opcode) const {
22+
#define MAKE_CASE(V) \
23+
case V: \
24+
return #V;
25+
26+
// These nodes don't have corresponding entries in *.td files yet.
27+
switch (static_cast<NVPTXISD::NodeType>(Opcode)) {
28+
MAKE_CASE(NVPTXISD::LOAD_PARAM)
29+
MAKE_CASE(NVPTXISD::DeclareScalarRet)
30+
MAKE_CASE(NVPTXISD::CallSymbol)
31+
MAKE_CASE(NVPTXISD::CallSeqBegin)
32+
MAKE_CASE(NVPTXISD::CallSeqEnd)
33+
MAKE_CASE(NVPTXISD::LoadV2)
34+
MAKE_CASE(NVPTXISD::LoadV4)
35+
MAKE_CASE(NVPTXISD::LoadV8)
36+
MAKE_CASE(NVPTXISD::LDUV2)
37+
MAKE_CASE(NVPTXISD::LDUV4)
38+
MAKE_CASE(NVPTXISD::StoreV2)
39+
MAKE_CASE(NVPTXISD::StoreV4)
40+
MAKE_CASE(NVPTXISD::StoreV8)
41+
MAKE_CASE(NVPTXISD::SETP_F16X2)
42+
MAKE_CASE(NVPTXISD::SETP_BF16X2)
43+
MAKE_CASE(NVPTXISD::UNPACK_VECTOR)
44+
MAKE_CASE(NVPTXISD::Dummy)
45+
}
46+
#undef MAKE_CASE
47+
48+
return SelectionDAGGenTargetInfo::getTargetNodeName(Opcode);
49+
}
50+
1651
bool NVPTXSelectionDAGInfo::isTargetMemoryOpcode(unsigned Opcode) const {
17-
return Opcode >= NVPTXISD::FIRST_MEMORY_OPCODE &&
18-
Opcode <= NVPTXISD::LAST_MEMORY_OPCODE;
52+
// These nodes don't have corresponding entries in *.td files.
53+
if (Opcode >= NVPTXISD::FIRST_MEMORY_OPCODE &&
54+
Opcode <= NVPTXISD::LAST_MEMORY_OPCODE)
55+
return true;
56+
57+
// These nodes lack SDNPMemOperand property in *.td files.
58+
switch (static_cast<NVPTXISD::GenNodeType>(Opcode)) {
59+
default:
60+
break;
61+
case NVPTXISD::LoadParam:
62+
case NVPTXISD::LoadParamV2:
63+
case NVPTXISD::LoadParamV4:
64+
case NVPTXISD::StoreParam:
65+
case NVPTXISD::StoreParamV2:
66+
case NVPTXISD::StoreParamV4:
67+
case NVPTXISD::StoreParamS32:
68+
case NVPTXISD::StoreParamU32:
69+
case NVPTXISD::StoreRetval:
70+
case NVPTXISD::StoreRetvalV2:
71+
case NVPTXISD::StoreRetvalV4:
72+
return true;
73+
}
74+
75+
return SelectionDAGGenTargetInfo::isTargetMemoryOpcode(Opcode);
76+
}
77+
78+
void NVPTXSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
79+
const SDNode *N) const {
80+
switch (N->getOpcode()) {
81+
default:
82+
break;
83+
case NVPTXISD::ProxyReg:
84+
// invalid number of results; expected 3, got 1
85+
case NVPTXISD::BrxEnd:
86+
// invalid number of results; expected 1, got 2
87+
return;
88+
}
89+
90+
return SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
1991
}

‎llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.h‎

Lines changed: 37 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,13 +11,49 @@
1111

1212
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
1313

14+
#define GET_SDNODE_ENUM
15+
#include "NVPTXGenSDNodeInfo.inc"
16+
1417
namespace llvm {
18+
namespace NVPTXISD {
19+
20+
enum NodeType : unsigned {
21+
LOAD_PARAM = GENERATED_OPCODE_END,
22+
DeclareScalarRet,
23+
CallSymbol,
24+
CallSeqBegin,
25+
CallSeqEnd,
26+
SETP_F16X2,
27+
SETP_BF16X2,
28+
UNPACK_VECTOR,
29+
Dummy,
30+
31+
FIRST_MEMORY_OPCODE,
32+
LoadV2 = FIRST_MEMORY_OPCODE,
33+
LoadV4,
34+
LoadV8,
35+
LDUV2, // LDU.v2
36+
LDUV4, // LDU.v4
37+
StoreV2,
38+
StoreV4,
39+
StoreV8,
40+
LAST_MEMORY_OPCODE = StoreV4,
41+
};
1542

16-
class NVPTXSelectionDAGInfo : public SelectionDAGTargetInfo {
43+
} // namespace NVPTXISD
44+
45+
class NVPTXSelectionDAGInfo : public SelectionDAGGenTargetInfo {
1746
public:
47+
NVPTXSelectionDAGInfo();
48+
1849
~NVPTXSelectionDAGInfo() override;
1950

51+
const char *getTargetNodeName(unsigned Opcode) const override;
52+
2053
bool isTargetMemoryOpcode(unsigned Opcode) const override;
54+
55+
void verifyTargetNode(const SelectionDAG &DAG,
56+
const SDNode *N) const override;
2157
};
2258

2359
} // namespace llvm

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