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[Headers][X86] Allow MMX/SSE/AVX MOVMSK intrinsics to be used in constexpr
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12 files changed

+108
-28
lines changed

12 files changed

+108
-28
lines changed

‎clang/include/clang/Basic/BuiltinsX86.td‎

Lines changed: 10 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -185,7 +185,8 @@ let Features = "sse", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in
185185
def cvttss2si : X86Builtin<"int(_Vector<4, float>)">;
186186
}
187187

188-
let Features = "sse", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
188+
let Features = "sse",
189+
Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
189190
def movmskps : X86Builtin<"int(_Vector<4, float>)">;
190191
}
191192

@@ -211,11 +212,6 @@ let Features = "sse2", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
211212
def maskmovdqu : X86Builtin<"void(_Vector<16, char>, _Vector<16, char>, char *)">;
212213
}
213214

214-
let Features = "sse2", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
215-
def movmskpd : X86Builtin<"int(_Vector<2, double>)">;
216-
def pmovmskb128 : X86Builtin<"int(_Vector<16, char>)">;
217-
}
218-
219215
let Features = "sse2", Attributes = [NoThrow] in {
220216
def movnti : X86Builtin<"void(int *, int)">;
221217
}
@@ -224,6 +220,8 @@ let Features = "sse2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWi
224220
def pshuflw : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Constant int)">;
225221
def pshufd : X86Builtin<"_Vector<4, int>(_Vector<4, int>, _Constant int)">;
226222
def pshufhw : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Constant int)">;
223+
def movmskpd : X86Builtin<"int(_Vector<2, double>)">;
224+
def pmovmskb128 : X86Builtin<"int(_Vector<16, char>)">;
227225
}
228226

229227
let Features = "sse2", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
@@ -562,11 +560,8 @@ let Features = "avx",
562560
def vtestnzcps256 : X86Builtin<"int(_Vector<8, float>, _Vector<8, float>)">;
563561
def ptestz256 : X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
564562
def ptestc256 : X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
565-
def ptestnzc256 : X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
566-
}
567-
568-
let Features = "avx",
569-
Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
563+
def ptestnzc256
564+
: X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
570565
def movmskpd256 : X86Builtin<"int(_Vector<4, double>)">;
571566
def movmskps256 : X86Builtin<"int(_Vector<8, float>)">;
572567
}
@@ -605,9 +600,9 @@ let Features = "avx", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWid
605600

606601
let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
607602
def mpsadbw256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>, _Constant char)">;
608-
def palignr256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>, _Constant int)">;
609-
610-
def pmovmskb256 : X86Builtin<"int(_Vector<32, char>)">;
603+
def palignr256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, "
604+
"_Vector<32, char>, _Constant int)">;
605+
def pmulhrsw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
611606
def psadbw256 : X86Builtin<"_Vector<4, long long int>(_Vector<32, char>, _Vector<32, char>)">;
612607
def psignb256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>)">;
613608
def psignw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
@@ -632,6 +627,7 @@ let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] i
632627

633628

634629
let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
630+
def pmovmskb256 : X86Builtin<"int(_Vector<32, char>)">;
635631
def pavgb256 : X86Builtin<"_Vector<32, unsigned char>(_Vector<32, unsigned char>, _Vector<32, unsigned char>)">;
636632
def pavgw256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, unsigned short>, _Vector<16, unsigned short>)">;
637633

‎clang/lib/AST/ByteCode/InterpBuiltin.cpp‎

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2899,6 +2899,36 @@ static bool interp__builtin_ia32_test_op(
28992899
return true;
29002900
}
29012901

2902+
static bool interp__builtin_ia32_movmsk_op(InterpState &S, CodePtr OpPC,
2903+
const CallExpr *Call) {
2904+
assert(Call->getNumArgs() == 1);
2905+
2906+
const Pointer &Source = S.Stk.pop<Pointer>();
2907+
2908+
unsigned SourceLen = Source.getNumElems();
2909+
QualType ElemQT = getElemType(Source);
2910+
OptPrimType ElemT = S.getContext().classify(ElemQT);
2911+
unsigned ResultLen =
2912+
S.getASTContext().getTypeSize(Call->getType()); // Always 32-bit integer.
2913+
APInt Result(ResultLen, 0);
2914+
2915+
for (unsigned I = 0; I != SourceLen; ++I) {
2916+
APInt Elem;
2917+
if (ElemQT->isIntegerType()) {
2918+
INT_TYPE_SWITCH_NO_BOOL(*ElemT,
2919+
{ Elem = Source.elem<T>(I).toAPSInt(); });
2920+
} else if (ElemQT->isRealFloatingType()) {
2921+
using T = PrimConv<PT_Float>::T;
2922+
Elem = Source.elem<T>(I).getAPFloat().bitcastToAPInt();
2923+
} else {
2924+
return false;
2925+
}
2926+
Result.setBitVal(I, Elem.isNegative());
2927+
}
2928+
pushInteger(S, Result, Call->getType());
2929+
return true;
2930+
}
2931+
29022932
static bool interp__builtin_elementwise_triop(
29032933
InterpState &S, CodePtr OpPC, const CallExpr *Call,
29042934
llvm::function_ref<APInt(const APSInt &, const APSInt &, const APSInt &)>
@@ -3630,6 +3660,15 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
36303660
.extractBits(16, 1);
36313661
});
36323662

3663+
case clang::X86::BI__builtin_ia32_movmskps:
3664+
case clang::X86::BI__builtin_ia32_movmskpd:
3665+
case clang::X86::BI__builtin_ia32_pmovmskb128:
3666+
case clang::X86::BI__builtin_ia32_pmovmskb256:
3667+
case clang::X86::BI__builtin_ia32_movmskps256:
3668+
case clang::X86::BI__builtin_ia32_movmskpd256: {
3669+
return interp__builtin_ia32_movmsk_op(S, OpPC, Call);
3670+
}
3671+
36333672
case clang::X86::BI__builtin_ia32_pavgb128:
36343673
case clang::X86::BI__builtin_ia32_pavgw128:
36353674
case clang::X86::BI__builtin_ia32_pavgb256:

‎clang/lib/AST/ExprConstant.cpp‎

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15268,6 +15268,36 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const CallExpr *E,
1526815268
return Success(CarryOut, E);
1526915269
}
1527015270

15271+
case clang::X86::BI__builtin_ia32_movmskps:
15272+
case clang::X86::BI__builtin_ia32_movmskpd:
15273+
case clang::X86::BI__builtin_ia32_pmovmskb128:
15274+
case clang::X86::BI__builtin_ia32_pmovmskb256:
15275+
case clang::X86::BI__builtin_ia32_movmskps256:
15276+
case clang::X86::BI__builtin_ia32_movmskpd256: {
15277+
APValue Source;
15278+
if (!Evaluate(Source, Info, E->getArg(0)))
15279+
return false;
15280+
unsigned SourceLen = Source.getVectorLength();
15281+
const VectorType *VT = E->getArg(0)->getType()->castAs<VectorType>();
15282+
QualType ElemQT = VT->getElementType();
15283+
unsigned ResultLen = Info.Ctx.getTypeSize(
15284+
E->getCallReturnType(Info.Ctx)); // Always 32-bit integer.
15285+
APInt Result(ResultLen, 0);
15286+
15287+
for (unsigned I = 0; I != SourceLen; ++I) {
15288+
APInt Elem;
15289+
if (ElemQT->isIntegerType()) {
15290+
Elem = Source.getVectorElt(I).getInt();
15291+
} else if (ElemQT->isRealFloatingType()) {
15292+
Elem = Source.getVectorElt(I).getFloat().bitcastToAPInt();
15293+
} else {
15294+
return false;
15295+
}
15296+
Result.setBitVal(I, Elem.isNegative());
15297+
}
15298+
return Success(Result, E);
15299+
}
15300+
1527115301
case clang::X86::BI__builtin_ia32_bextr_u32:
1527215302
case clang::X86::BI__builtin_ia32_bextr_u64:
1527315303
case clang::X86::BI__builtin_ia32_bextri_u32:

‎clang/lib/Headers/avx2intrin.h‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1298,9 +1298,8 @@ _mm256_min_epu32(__m256i __a, __m256i __b) {
12981298
/// \param __a
12991299
/// A 256-bit integer vector containing the source bytes.
13001300
/// \returns The 32-bit integer mask.
1301-
static __inline__ int __DEFAULT_FN_ATTRS256
1302-
_mm256_movemask_epi8(__m256i __a)
1303-
{
1301+
static __inline__ int __DEFAULT_FN_ATTRS256_CONSTEXPR
1302+
_mm256_movemask_epi8(__m256i __a) {
13041303
return __builtin_ia32_pmovmskb256((__v32qi)__a);
13051304
}
13061305

‎clang/lib/Headers/avxintrin.h‎

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2941,9 +2941,8 @@ _mm256_testnzc_si256(__m256i __a, __m256i __b) {
29412941
/// A 256-bit vector of [4 x double] containing the double-precision
29422942
/// floating point values with sign bits to be extracted.
29432943
/// \returns The sign bits from the operand, written to bits [3:0].
2944-
static __inline int __DEFAULT_FN_ATTRS
2945-
_mm256_movemask_pd(__m256d __a)
2946-
{
2944+
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
2945+
_mm256_movemask_pd(__m256d __a) {
29472946
return __builtin_ia32_movmskpd256((__v4df)__a);
29482947
}
29492948

@@ -2959,9 +2958,8 @@ _mm256_movemask_pd(__m256d __a)
29592958
/// A 256-bit vector of [8 x float] containing the single-precision floating
29602959
/// point values with sign bits to be extracted.
29612960
/// \returns The sign bits from the operand, written to bits [7:0].
2962-
static __inline int __DEFAULT_FN_ATTRS
2963-
_mm256_movemask_ps(__m256 __a)
2964-
{
2961+
static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
2962+
_mm256_movemask_ps(__m256 __a) {
29652963
return __builtin_ia32_movmskps256((__v8sf)__a);
29662964
}
29672965

‎clang/lib/Headers/emmintrin.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4280,7 +4280,8 @@ _mm_packus_epi16(__m128i __a, __m128i __b) {
42804280
/// A 128-bit integer vector containing the values with bits to be extracted.
42814281
/// \returns The most significant bits from each 8-bit element in \a __a,
42824282
/// written to bits [15:0]. The other bits are assigned zeros.
4283-
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) {
4283+
static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
4284+
_mm_movemask_epi8(__m128i __a) {
42844285
return __builtin_ia32_pmovmskb128((__v16qi)__a);
42854286
}
42864287

@@ -4699,7 +4700,8 @@ _mm_unpacklo_pd(__m128d __a, __m128d __b) {
46994700
/// be extracted.
47004701
/// \returns The sign bits from each of the double-precision elements in \a __a,
47014702
/// written to bits [1:0]. The remaining bits are assigned values of zero.
4702-
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_pd(__m128d __a) {
4703+
static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
4704+
_mm_movemask_pd(__m128d __a) {
47034705
return __builtin_ia32_movmskpd((__v2df)__a);
47044706
}
47054707

‎clang/lib/Headers/xmmintrin.h‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3014,9 +3014,7 @@ _mm_cvtps_pi8(__m128 __a)
30143014
/// \returns A 32-bit integer value. Bits [3:0] contain the sign bits from each
30153015
/// single-precision floating-point element of the parameter. Bits [31:4] are
30163016
/// set to zero.
3017-
static __inline__ int __DEFAULT_FN_ATTRS
3018-
_mm_movemask_ps(__m128 __a)
3019-
{
3017+
static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR _mm_movemask_ps(__m128 __a) {
30203018
return __builtin_ia32_movmskps((__v4sf)__a);
30213019
}
30223020

‎clang/test/CodeGen/X86/avx-builtins.c‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1348,12 +1348,16 @@ int test_mm256_movemask_pd(__m256d A) {
13481348
// CHECK: call {{.*}}i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %{{.*}})
13491349
return _mm256_movemask_pd(A);
13501350
}
1351+
TEST_CONSTEXPR(_mm256_movemask_pd((__m256d)(__v4df){-1234.5678901234, 98765.4321098765, 0.000123456789, -3.14159265358979}) == 0x9);
1352+
TEST_CONSTEXPR(_mm256_movemask_pd((__m256d)(__v4df){-0.000000987654321, -99999.999999999, 42.424242424242, 314159.2653589793}) == 0x3);
13511353

13521354
int test_mm256_movemask_ps(__m256 A) {
13531355
// CHECK-LABEL: test_mm256_movemask_ps
13541356
// CHECK: call {{.*}}i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %{{.*}})
13551357
return _mm256_movemask_ps(A);
13561358
}
1359+
TEST_CONSTEXPR(_mm256_movemask_ps((__m256)(__v8sf){-12.3456f, 34.7890f, -0.0001234f, 123456.78f, -987.654f, 0.001234f, 3.14159f, -256.001f}) == 0x95);
1360+
TEST_CONSTEXPR(_mm256_movemask_ps((__m256)(__v8sf){0.333333f, -45.6789f, 999.999f, -0.9999f, 17.234f, -128.512f, 2048.0f, -3.14f}) == 0xAA);
13571361

13581362
__m256d test_mm256_mul_pd(__m256d A, __m256d B) {
13591363
// CHECK-LABEL: test_mm256_mul_pd

‎clang/test/CodeGen/X86/avx2-builtins.c‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -992,6 +992,9 @@ int test_mm256_movemask_epi8(__m256i a) {
992992
// CHECK: call {{.*}}i32 @llvm.x86.avx2.pmovmskb(<32 x i8> %{{.*}})
993993
return _mm256_movemask_epi8(a);
994994
}
995+
TEST_CONSTEXPR(_mm256_movemask_epi8((__m256i)(__v32qu){0x7F,0x80,0x01,0xFF,0x00,0xAA,0x55,0xC3,0x12,0x8E,0x00,0xFE,0x7E,0x81,0xFF,0x01,0xB6,0x00,0x39,0x40,0xD0,0x05,0x80,0x2A,0x7B,0x00,0x90,0xFF,0x01,0x34,0xC0,0x6D}) == 0x4C516AAA);
996+
TEST_CONSTEXPR(_mm256_movemask_epi8((__m256i)(__v8si){(int)0x80FF00AA,(int)0x7F0183E1,(int)0xDEADBEEF,(int)0xC0000001,(int)0x00000000,(int)0xFFFFFFFF,(int)0x12345678,(int)0x90ABCDEF}) == 0xF0F08F3D);
997+
TEST_CONSTEXPR(_mm256_movemask_epi8((__m256i)(__v4du){0xFF00000000000080ULL,0x7F010203040506C3ULL,0x8000000000000000ULL,0x0123456789ABCDEFULL}) == 0x0F800181);
995998

996999
__m256i test_mm256_mpsadbw_epu8(__m256i x, __m256i y) {
9971000
// CHECK-LABEL: test_mm256_mpsadbw_epu8

‎clang/test/CodeGen/X86/mmx-builtins.c‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -409,6 +409,10 @@ int test_mm_movemask_pi8(__m64 a) {
409409
// CHECK: call {{.*}}i32 @llvm.x86.sse2.pmovmskb.128(
410410
return _mm_movemask_pi8(a);
411411
}
412+
TEST_CONSTEXPR(_mm_movemask_pi8((__m64)((__v8qu){0x7F,0x80,0x01,0xFF,0x00,0xAA,0x55,0xC3})) == 0xAA);
413+
TEST_CONSTEXPR(_mm_movemask_pi8((__m64)((__v2si){(int)0x80FF00AA,(int)0x7F0183E1})) == 0x3D);
414+
TEST_CONSTEXPR(_mm_movemask_pi8((__m64)((__v1di){(long long)0xE110837A00924DB0ULL})) == 0xA5);
415+
412416

413417
__m64 test_mm_mul_su32(__m64 a, __m64 b) {
414418
// CHECK-LABEL: test_mm_mul_su32

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