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[MLIR][XeGPU] fix load/store/prefetch op offset verifier (#166137)
The verifier of `xegpu.{load/store/prefetch}_nd` op fails if `offset` a mix of static and dynamic values, e.g. `offset = [0, %c0]`. In this case the length of dynamic offsets is 1 and the check `offsetSize != tDescRank` (=2) fails. Instead, we should check the length of `getMixedOffsets()`.
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-15
lines changed

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mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp

Lines changed: 6 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -498,11 +498,8 @@ LogicalResult PrefetchNdOp::verify() {
498498
return emitOpError("invalid l3_hint: ") << getL3HintAttr();
499499

500500
int64_t tDescRank = tdescTy.getRank();
501-
int64_t offsetSize = static_cast<int64_t>(getOffsets().size());
502-
int64_t constOffsetSize =
503-
getConstOffsetsAttr() ? getConstOffsetsAttr().size() : 0;
504-
if (((offsetSize != 0) && (offsetSize != tDescRank)) ||
505-
((constOffsetSize != 0) && (constOffsetSize != tDescRank)))
501+
int64_t offsetSize = getMixedOffsets().size();
502+
if (offsetSize != 0 && offsetSize != tDescRank)
506503
return emitOpError(
507504
"Mismatched ranks between offsets and tensor descriptor");
508505

@@ -623,11 +620,8 @@ LogicalResult LoadNdOp::verify() {
623620
<< tdescTy;
624621

625622
int64_t tDescRank = tdescTy.getRank();
626-
int64_t offsetSize = static_cast<int64_t>(getOffsets().size());
627-
int64_t constOffsetSize =
628-
getConstOffsetsAttr() ? getConstOffsetsAttr().size() : 0;
629-
if (((offsetSize != 0) && (offsetSize != tDescRank)) ||
630-
((constOffsetSize != 0) && (constOffsetSize != tDescRank)))
623+
int64_t offsetSize = getMixedOffsets().size();
624+
if (offsetSize != 0 && offsetSize != tDescRank)
631625
return emitOpError(
632626
"Mismatched ranks between offsets and tensor descriptor");
633627

@@ -717,11 +711,8 @@ LogicalResult StoreNdOp::verify() {
717711
<< dstTy;
718712

719713
int64_t tDescRank = dstTy.getRank();
720-
int64_t offsetSize = static_cast<int64_t>(getOffsets().size());
721-
int64_t constOffsetSize =
722-
getConstOffsetsAttr() ? getConstOffsetsAttr().size() : 0;
723-
if (((offsetSize != 0) && (offsetSize != tDescRank)) ||
724-
((constOffsetSize != 0) && (constOffsetSize != tDescRank)))
714+
int64_t offsetSize = getMixedOffsets().size();
715+
if (offsetSize != 0 && offsetSize != tDescRank)
725716
return emitOpError(
726717
"Mismatched ranks between offsets and tensor descriptor");
727718

mlir/test/Dialect/XeGPU/ops.mlir

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -278,6 +278,15 @@ gpu.func @subgroup_load_nd_offset_1(%src: memref<24x32xf32>, %x : index, %y : in
278278
gpu.return
279279
}
280280

281+
// CHECK: func @subgroup_load_nd_offset_2(%[[arg0:.*]]: memref<24x32xf32>, %arg1: index) {
282+
gpu.func @subgroup_load_nd_offset_2(%src: memref<24x32xf32>, %x : index) {
283+
// CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %arg0 : memref<24x32xf32> -> !xegpu.tensor_desc<16x8xf32>
284+
%1 = xegpu.create_nd_tdesc %src : memref<24x32xf32> -> !xegpu.tensor_desc<16x8xf32>
285+
// CHECK: %[[R1:.*]] = xegpu.load_nd %[[R0]][%arg1, 0] <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>, transpose = array<i64: 1, 0>}> : !xegpu.tensor_desc<16x8xf32> -> vector<8x16xf32>
286+
%2 = xegpu.load_nd %1[%x, 0] <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>, transpose = array<i64: 1, 0>}> : !xegpu.tensor_desc<16x8xf32> -> vector<8x16xf32>
287+
gpu.return
288+
}
289+
281290
// CHECK: func @simt_load_nd_8(%[[arg0:.*]]: memref<24x32xf32>) {
282291
gpu.func @simt_load_nd_8(%src: memref<24x32xf32>) {
283292
// CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %arg0[0, 0] : memref<24x32xf32> -> !xegpu.tensor_desc<16x8xf32>

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