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[RISCV][GISel] Use the correct calling convention during call lowering (#142148)
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‎llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -588,7 +588,7 @@ bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
588588
MachineFunction &MF = MIRBuilder.getMF();
589589
const DataLayout &DL = MF.getDataLayout();
590590
const Function &F = MF.getFunction();
591-
CallingConv::ID CC = F.getCallingConv();
591+
CallingConv::ID CC = Info.CallConv;
592592

593593
const RISCVSubtarget &Subtarget =
594594
MIRBuilder.getMF().getSubtarget<RISCVSubtarget>();

‎llvm/test/CodeGen/RISCV/GlobalISel/calls.ll‎

Lines changed: 111 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,111 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc -global-isel -mtriple=riscv32 < %s | FileCheck -check-prefixes=CHECK,RV32I %s
3+
; RUN: llc -global-isel -mtriple=riscv64 < %s | FileCheck -check-prefix=RV64I %s
4+
5+
declare i32 @external_many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind
6+
7+
define i32 @test_call_external_many_args(i32 %a) nounwind {
8+
; CHECK-LABEL: test_call_external_many_args:
9+
; CHECK: # %bb.0:
10+
; CHECK-NEXT: addi sp, sp, -16
11+
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
12+
; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
13+
; CHECK-NEXT: mv s0, a0
14+
; CHECK-NEXT: sw a0, 0(sp)
15+
; CHECK-NEXT: sw a0, 4(sp)
16+
; CHECK-NEXT: mv a1, a0
17+
; CHECK-NEXT: mv a2, a0
18+
; CHECK-NEXT: mv a3, a0
19+
; CHECK-NEXT: mv a4, a0
20+
; CHECK-NEXT: mv a5, a0
21+
; CHECK-NEXT: mv a6, a0
22+
; CHECK-NEXT: mv a7, a0
23+
; CHECK-NEXT: call external_many_args
24+
; CHECK-NEXT: mv a0, s0
25+
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
26+
; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
27+
; CHECK-NEXT: addi sp, sp, 16
28+
; CHECK-NEXT: ret
29+
;
30+
; RV64I-LABEL: test_call_external_many_args:
31+
; RV64I: # %bb.0:
32+
; RV64I-NEXT: addi sp, sp, -32
33+
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
34+
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
35+
; RV64I-NEXT: mv s0, a0
36+
; RV64I-NEXT: sd a0, 0(sp)
37+
; RV64I-NEXT: sd a0, 8(sp)
38+
; RV64I-NEXT: mv a1, a0
39+
; RV64I-NEXT: mv a2, a0
40+
; RV64I-NEXT: mv a3, a0
41+
; RV64I-NEXT: mv a4, a0
42+
; RV64I-NEXT: mv a5, a0
43+
; RV64I-NEXT: mv a6, a0
44+
; RV64I-NEXT: mv a7, a0
45+
; RV64I-NEXT: call external_many_args
46+
; RV64I-NEXT: mv a0, s0
47+
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
48+
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
49+
; RV64I-NEXT: addi sp, sp, 32
50+
; RV64I-NEXT: ret
51+
%1 = call i32 @external_many_args(i32 %a, i32 %a, i32 %a, i32 %a, i32 %a,
52+
i32 %a, i32 %a, i32 %a, i32 %a, i32 %a)
53+
ret i32 %a
54+
}
55+
56+
define fastcc void @fastcc_call_nonfastcc(){
57+
; CHECK-LABEL: fastcc_call_nonfastcc:
58+
; CHECK: # %bb.0:
59+
; CHECK-NEXT: addi sp, sp, -16
60+
; CHECK-NEXT: .cfi_def_cfa_offset 16
61+
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
62+
; CHECK-NEXT: .cfi_offset ra, -4
63+
; CHECK-NEXT: li t0, 9
64+
; CHECK-NEXT: li t1, 10
65+
; CHECK-NEXT: li a0, 1
66+
; CHECK-NEXT: li a1, 2
67+
; CHECK-NEXT: li a2, 3
68+
; CHECK-NEXT: li a3, 4
69+
; CHECK-NEXT: li a4, 5
70+
; CHECK-NEXT: li a5, 6
71+
; CHECK-NEXT: li a6, 7
72+
; CHECK-NEXT: li a7, 8
73+
; CHECK-NEXT: sw t0, 0(sp)
74+
; CHECK-NEXT: sw t1, 4(sp)
75+
; CHECK-NEXT: call external_many_args
76+
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
77+
; CHECK-NEXT: .cfi_restore ra
78+
; CHECK-NEXT: addi sp, sp, 16
79+
; CHECK-NEXT: .cfi_def_cfa_offset 0
80+
; CHECK-NEXT: ret
81+
;
82+
; RV64I-LABEL: fastcc_call_nonfastcc:
83+
; RV64I: # %bb.0:
84+
; RV64I-NEXT: addi sp, sp, -32
85+
; RV64I-NEXT: .cfi_def_cfa_offset 32
86+
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
87+
; RV64I-NEXT: .cfi_offset ra, -8
88+
; RV64I-NEXT: li t0, 9
89+
; RV64I-NEXT: li t1, 10
90+
; RV64I-NEXT: li a0, 1
91+
; RV64I-NEXT: li a1, 2
92+
; RV64I-NEXT: li a2, 3
93+
; RV64I-NEXT: li a3, 4
94+
; RV64I-NEXT: li a4, 5
95+
; RV64I-NEXT: li a5, 6
96+
; RV64I-NEXT: li a6, 7
97+
; RV64I-NEXT: li a7, 8
98+
; RV64I-NEXT: sd t0, 0(sp)
99+
; RV64I-NEXT: sd t1, 8(sp)
100+
; RV64I-NEXT: call external_many_args
101+
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
102+
; RV64I-NEXT: .cfi_restore ra
103+
; RV64I-NEXT: addi sp, sp, 32
104+
; RV64I-NEXT: .cfi_def_cfa_offset 0
105+
; RV64I-NEXT: ret
106+
call void @external_many_args(i32 1, i32 2,i32 3,i32 4,i32 5,i32 6,i32 7,i32 8,i32 9,i32 10)
107+
ret void
108+
}
109+
110+
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
111+
; RV32I: {{.*}}

‎llvm/test/CodeGen/RISCV/calls.ll‎

Lines changed: 162 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -865,6 +865,168 @@ define i32 @test_call_defined_many_args(i32 %a) nounwind {
865865
i32 %a, i32 %a, i32 %a, i32 %a, i32 %a)
866866
ret i32 %1
867867
}
868+
869+
define fastcc void @fastcc_call_nonfastcc(){
870+
; CHECK-LABEL: fastcc_call_nonfastcc:
871+
; CHECK: # %bb.0:
872+
; CHECK-NEXT: addi sp, sp, -16
873+
; CHECK-NEXT: .cfi_def_cfa_offset 16
874+
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
875+
; CHECK-NEXT: .cfi_offset ra, -4
876+
; CHECK-NEXT: li t0, 10
877+
; CHECK-NEXT: li t1, 9
878+
; CHECK-NEXT: li a0, 1
879+
; CHECK-NEXT: li a1, 2
880+
; CHECK-NEXT: li a2, 3
881+
; CHECK-NEXT: li a3, 4
882+
; CHECK-NEXT: li a4, 5
883+
; CHECK-NEXT: li a5, 6
884+
; CHECK-NEXT: li a6, 7
885+
; CHECK-NEXT: li a7, 8
886+
; CHECK-NEXT: sw t1, 0(sp)
887+
; CHECK-NEXT: sw t0, 4(sp)
888+
; CHECK-NEXT: call external_many_args
889+
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
890+
; CHECK-NEXT: .cfi_restore ra
891+
; CHECK-NEXT: addi sp, sp, 16
892+
; CHECK-NEXT: .cfi_def_cfa_offset 0
893+
; CHECK-NEXT: ret
894+
;
895+
; RV64I-LABEL: fastcc_call_nonfastcc:
896+
; RV64I: # %bb.0:
897+
; RV64I-NEXT: addi sp, sp, -32
898+
; RV64I-NEXT: .cfi_def_cfa_offset 32
899+
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
900+
; RV64I-NEXT: .cfi_offset ra, -8
901+
; RV64I-NEXT: li t0, 10
902+
; RV64I-NEXT: li t1, 9
903+
; RV64I-NEXT: li a0, 1
904+
; RV64I-NEXT: li a1, 2
905+
; RV64I-NEXT: li a2, 3
906+
; RV64I-NEXT: li a3, 4
907+
; RV64I-NEXT: li a4, 5
908+
; RV64I-NEXT: li a5, 6
909+
; RV64I-NEXT: li a6, 7
910+
; RV64I-NEXT: li a7, 8
911+
; RV64I-NEXT: sd t1, 0(sp)
912+
; RV64I-NEXT: sd t0, 8(sp)
913+
; RV64I-NEXT: call external_many_args
914+
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
915+
; RV64I-NEXT: .cfi_restore ra
916+
; RV64I-NEXT: addi sp, sp, 32
917+
; RV64I-NEXT: .cfi_def_cfa_offset 0
918+
; RV64I-NEXT: ret
919+
;
920+
; RV64I-SMALL-LABEL: fastcc_call_nonfastcc:
921+
; RV64I-SMALL: # %bb.0:
922+
; RV64I-SMALL-NEXT: addi sp, sp, -32
923+
; RV64I-SMALL-NEXT: .cfi_def_cfa_offset 32
924+
; RV64I-SMALL-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
925+
; RV64I-SMALL-NEXT: .cfi_offset ra, -8
926+
; RV64I-SMALL-NEXT: li t0, 10
927+
; RV64I-SMALL-NEXT: li t1, 9
928+
; RV64I-SMALL-NEXT: li a0, 1
929+
; RV64I-SMALL-NEXT: li a1, 2
930+
; RV64I-SMALL-NEXT: li a2, 3
931+
; RV64I-SMALL-NEXT: li a3, 4
932+
; RV64I-SMALL-NEXT: li a4, 5
933+
; RV64I-SMALL-NEXT: li a5, 6
934+
; RV64I-SMALL-NEXT: li a6, 7
935+
; RV64I-SMALL-NEXT: li a7, 8
936+
; RV64I-SMALL-NEXT: sd t1, 0(sp)
937+
; RV64I-SMALL-NEXT: sd t0, 8(sp)
938+
; RV64I-SMALL-NEXT: call external_many_args
939+
; RV64I-SMALL-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
940+
; RV64I-SMALL-NEXT: .cfi_restore ra
941+
; RV64I-SMALL-NEXT: addi sp, sp, 32
942+
; RV64I-SMALL-NEXT: .cfi_def_cfa_offset 0
943+
; RV64I-SMALL-NEXT: ret
944+
;
945+
; RV64I-MEDIUM-LABEL: fastcc_call_nonfastcc:
946+
; RV64I-MEDIUM: # %bb.0:
947+
; RV64I-MEDIUM-NEXT: addi sp, sp, -32
948+
; RV64I-MEDIUM-NEXT: .cfi_def_cfa_offset 32
949+
; RV64I-MEDIUM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
950+
; RV64I-MEDIUM-NEXT: .cfi_offset ra, -8
951+
; RV64I-MEDIUM-NEXT: li t0, 10
952+
; RV64I-MEDIUM-NEXT: li t1, 9
953+
; RV64I-MEDIUM-NEXT: li a0, 1
954+
; RV64I-MEDIUM-NEXT: li a1, 2
955+
; RV64I-MEDIUM-NEXT: li a2, 3
956+
; RV64I-MEDIUM-NEXT: li a3, 4
957+
; RV64I-MEDIUM-NEXT: li a4, 5
958+
; RV64I-MEDIUM-NEXT: li a5, 6
959+
; RV64I-MEDIUM-NEXT: li a6, 7
960+
; RV64I-MEDIUM-NEXT: li a7, 8
961+
; RV64I-MEDIUM-NEXT: sd t1, 0(sp)
962+
; RV64I-MEDIUM-NEXT: sd t0, 8(sp)
963+
; RV64I-MEDIUM-NEXT: call external_many_args
964+
; RV64I-MEDIUM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
965+
; RV64I-MEDIUM-NEXT: .cfi_restore ra
966+
; RV64I-MEDIUM-NEXT: addi sp, sp, 32
967+
; RV64I-MEDIUM-NEXT: .cfi_def_cfa_offset 0
968+
; RV64I-MEDIUM-NEXT: ret
969+
;
970+
; RV64I-LARGE-LABEL: fastcc_call_nonfastcc:
971+
; RV64I-LARGE: # %bb.0:
972+
; RV64I-LARGE-NEXT: addi sp, sp, -32
973+
; RV64I-LARGE-NEXT: .cfi_def_cfa_offset 32
974+
; RV64I-LARGE-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
975+
; RV64I-LARGE-NEXT: .cfi_offset ra, -8
976+
; RV64I-LARGE-NEXT: li t0, 10
977+
; RV64I-LARGE-NEXT: li t1, 9
978+
; RV64I-LARGE-NEXT: .Lpcrel_hi6:
979+
; RV64I-LARGE-NEXT: auipc a5, %pcrel_hi(.LCPI11_0)
980+
; RV64I-LARGE-NEXT: li a0, 1
981+
; RV64I-LARGE-NEXT: li a1, 2
982+
; RV64I-LARGE-NEXT: li a2, 3
983+
; RV64I-LARGE-NEXT: li a3, 4
984+
; RV64I-LARGE-NEXT: li a4, 5
985+
; RV64I-LARGE-NEXT: ld t2, %pcrel_lo(.Lpcrel_hi6)(a5)
986+
; RV64I-LARGE-NEXT: li a5, 6
987+
; RV64I-LARGE-NEXT: li a6, 7
988+
; RV64I-LARGE-NEXT: li a7, 8
989+
; RV64I-LARGE-NEXT: sd t1, 0(sp)
990+
; RV64I-LARGE-NEXT: sd t0, 8(sp)
991+
; RV64I-LARGE-NEXT: jalr t2
992+
; RV64I-LARGE-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
993+
; RV64I-LARGE-NEXT: .cfi_restore ra
994+
; RV64I-LARGE-NEXT: addi sp, sp, 32
995+
; RV64I-LARGE-NEXT: .cfi_def_cfa_offset 0
996+
; RV64I-LARGE-NEXT: ret
997+
;
998+
; RV64I-LARGE-ZICFILP-LABEL: fastcc_call_nonfastcc:
999+
; RV64I-LARGE-ZICFILP: # %bb.0:
1000+
; RV64I-LARGE-ZICFILP-NEXT: lpad 0
1001+
; RV64I-LARGE-ZICFILP-NEXT: addi sp, sp, -32
1002+
; RV64I-LARGE-ZICFILP-NEXT: .cfi_def_cfa_offset 32
1003+
; RV64I-LARGE-ZICFILP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
1004+
; RV64I-LARGE-ZICFILP-NEXT: .cfi_offset ra, -8
1005+
; RV64I-LARGE-ZICFILP-NEXT: li t0, 10
1006+
; RV64I-LARGE-ZICFILP-NEXT: li t1, 9
1007+
; RV64I-LARGE-ZICFILP-NEXT: .Lpcrel_hi6:
1008+
; RV64I-LARGE-ZICFILP-NEXT: auipc a5, %pcrel_hi(.LCPI11_0)
1009+
; RV64I-LARGE-ZICFILP-NEXT: li a0, 1
1010+
; RV64I-LARGE-ZICFILP-NEXT: li a1, 2
1011+
; RV64I-LARGE-ZICFILP-NEXT: li a2, 3
1012+
; RV64I-LARGE-ZICFILP-NEXT: li a3, 4
1013+
; RV64I-LARGE-ZICFILP-NEXT: li a4, 5
1014+
; RV64I-LARGE-ZICFILP-NEXT: ld t2, %pcrel_lo(.Lpcrel_hi6)(a5)
1015+
; RV64I-LARGE-ZICFILP-NEXT: li a5, 6
1016+
; RV64I-LARGE-ZICFILP-NEXT: li a6, 7
1017+
; RV64I-LARGE-ZICFILP-NEXT: li a7, 8
1018+
; RV64I-LARGE-ZICFILP-NEXT: sd t1, 0(sp)
1019+
; RV64I-LARGE-ZICFILP-NEXT: sd t0, 8(sp)
1020+
; RV64I-LARGE-ZICFILP-NEXT: jalr t2
1021+
; RV64I-LARGE-ZICFILP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
1022+
; RV64I-LARGE-ZICFILP-NEXT: .cfi_restore ra
1023+
; RV64I-LARGE-ZICFILP-NEXT: addi sp, sp, 32
1024+
; RV64I-LARGE-ZICFILP-NEXT: .cfi_def_cfa_offset 0
1025+
; RV64I-LARGE-ZICFILP-NEXT: ret
1026+
call void @external_many_args(i32 1, i32 2,i32 3,i32 4,i32 5,i32 6,i32 7,i32 8,i32 9,i32 10)
1027+
ret void
1028+
}
1029+
8681030
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
8691031
; RV32I: {{.*}}
8701032
; RV32I-PIC: {{.*}}

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