address PR comments

Author: spall

clang/lib/CodeGen/CGBuiltin.cpp

@@ -18772,6 +18772,7 @@ Intrinsic::ID getFirstBitHighIntrinsic(CGHLSLRuntime &RT, QualType QT) {
     return RT.getFirstBitSHighIntrinsic();
   }
 
+  assert(QT->hasUnsignedIntegerRepresentation());
   return RT.getFirstBitUHighIntrinsic();
 }
 

clang/lib/Sema/SemaHLSL.cpp

@@ -1963,6 +1963,8 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
           << 1 << /* integer ty */ 6 << ArgTy;
       return true;
     }
+
+    TheCall->setType(ArgTy);
     break;
   }
   case Builtin::BI__builtin_hlsl_select: {

llvm/lib/Target/DirectX/DXIL.td

@@ -564,7 +564,7 @@ def CountBits :  DXILOp<31, unaryBits> {
   let attributes = [Attributes<DXIL1_0, [ReadNone]>];
 }
 
-def FBH :  DXILOp<33, unary> {
+def FirstbitHi :  DXILOp<33, unaryBits> {
   let Doc = "Returns the location of the first set bit starting from "
             "the highest order bit and working downward.";
   let LLVMIntrinsic = int_dx_firstbituhigh;
@@ -576,7 +576,7 @@ def FBH :  DXILOp<33, unary> {
   let attributes = [Attributes<DXIL1_0, [ReadNone]>];
 }
 
-def FBSH :  DXILOp<34, unary> {
+def FirstbitSHi :  DXILOp<34, unaryBits> {
   let Doc = "Returns the location of the first set bit from "
             "the highest order bit based on the sign.";
   let LLVMIntrinsic = int_dx_firstbitshigh;

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

@@ -2676,9 +2676,9 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
     return selectExtInst(ResVReg, ResType, I, CL::rsqrt, GL::InverseSqrt);
   case Intrinsic::spv_sign:
     return selectSign(ResVReg, ResType, I);
-  case Intrinsic::spv_firstbituhigh:
+  case Intrinsic::spv_firstbituhigh: // There is no CL equivalent of FindUMsb
     return selectExtInst(ResVReg, ResType, I, GL::FindUMsb);
-  case Intrinsic::spv_firstbitshigh:
+  case Intrinsic::spv_firstbitshigh: // There is no CL equivalent of FindSMsb
     return selectExtInst(ResVReg, ResType, I, GL::FindSMsb);
   case Intrinsic::spv_group_memory_barrier_with_group_sync: {
     Register MemSemReg =