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[Hexagon] Handle truncate of v64i32 -> v64i1 when Hvx is enabled
Change-Id: I06f7ec13e3f024487117e65aa61c666c16027334
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llvm/lib/Target/Hexagon/HexagonPatternsHVX.td

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@@ -612,6 +612,9 @@ let Predicates = [UseHVX] in {
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(V6_vandvrt HvxVR:$Vs, (ToI32 0x01010101))>;
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def: Pat<(VecQ32 (trunc HVI32:$Vs)),
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(V6_vandvrt HvxVR:$Vs, (ToI32 0x01010101))>;
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def: Pat<(VecQ16 (trunc HWI32:$Vss)),
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(Combineq(VecQ32(V6_vandvrt (HiVec $Vss), (ToI32 0x01010101))),
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(VecQ32 (V6_vandvrt (LoVec $Vss), (ToI32 0x01010101))))>;
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}
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let Predicates = [UseHVX] in {
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; RUN: llc --mtriple=hexagon -mattr=+hvxv79,+hvx-length128b < %s | FileCheck %s
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define void @f5(<64 x i32> %a0, ptr %a1) {
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; CHECK-LABEL: f5:
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; CHECK: r{{[0-9]+}}:[[RMASK:[0-9]+]] = combine(#-1,##16843009)
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; CHECK-DAG: q[[Q0:[0-9]+]] = vand(v{{[0-9]+}},r[[RMASK]])
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; CHECK-DAG: q[[Q1:[0-9]+]] = vand(v{{[0-9]+}},r[[RMASK]])
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; CHECK: v{{[0-9]+}}.b = vpacke(v{{[0-9]+}}.h,v{{[0-9]+}}.h)
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; CHECK: v{{[0-9]+}}.b = vpacke(v{{[0-9]+}}.h,v{{[0-9]+}}.h)
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; CHECK: v[[VROR:[0-9]+]] = vror(v{{[0-9]+}},r{{[0-9]+}})
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; CHECK: v[[VOR:[0-9]+]] = vor(v[[VROR]],v{{[0-9]+}})
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; CHECK: q{{[0-9]+}} = vand(v[[VOR]],r{{[0-9]+}})
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b0:
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%v0 = trunc <64 x i32> %a0 to <64 x i1>
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store <64 x i1> %v0, ptr %a1, align 1
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ret void
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}
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