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fix comment from pierre
1 parent bebeb48 commit ef61cfb

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2 files changed

+20
-19
lines changed

2 files changed

+20
-19
lines changed

llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -332,7 +332,7 @@ def AMDGPUumed3 : SDNode<"AMDGPUISD::UMED3", AMDGPUDTIntTernaryOp,
332332
[]
333333
>;
334334

335-
// Special node to handle v_sat_pk to avoid v2i8
335+
// Special node to pack v2i8 into i16 for v_sat_pk lowering.
336336
def AMDGPUsat_pk_cast : SDNode<"AMDGPUISD::SAT_PK_CAST", SDTUnaryOp, []>;
337337

338338
def AMDGPUfmed3_impl : SDNode<"AMDGPUISD::FMED3", SDTFPTernaryOp, []>;

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 19 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -6657,25 +6657,26 @@ void SITargetLowering::ReplaceNodeResults(SDNode *N,
66576657
SDValue Op = DAG.getNode(AMDGPUISD::SAT_PK_CAST, SL, MVT::i16, Src);
66586658
Op = DAG.getNode(ISD::BITCAST, SL, N->getValueType(0), Op);
66596659
Results.push_back(Op);
6660-
} else {
6661-
// Must be even number
6662-
assert((EleNo & 1) == 0);
6663-
SmallVector<SDValue> DstPairs;
6664-
EVT SrcEleVT = SrcVT.getVectorElementType();
6665-
EVT DstEleVT = DstVT.getVectorElementType();
6666-
EVT SrcPairVT = EVT::getVectorVT(*DAG.getContext(), SrcEleVT, 2);
6667-
EVT DstPairVT = EVT::getVectorVT(*DAG.getContext(), DstEleVT, 2);
6668-
for (unsigned i = 0; i != EleNo; i += 2) {
6669-
SDValue SrcPair = DAG.getNode(ISD::EXTRACT_SUBVECTOR, SL, SrcPairVT,
6670-
Src, DAG.getConstant(i, SL, MVT::i32));
6671-
SDValue SatPk =
6672-
DAG.getNode(AMDGPUISD::SAT_PK_CAST, SL, MVT::i16, SrcPair);
6673-
SDValue DstPair = DAG.getNode(ISD::BITCAST, SL, DstPairVT, SatPk);
6674-
DstPairs.push_back(DstPair);
6675-
}
6676-
SDValue Op = DAG.getNode(ISD::CONCAT_VECTORS, SL, DstVT, DstPairs);
6677-
Results.push_back(Op);
6660+
break;
66786661
}
6662+
6663+
// Vector case, number of element must be even
6664+
assert((EleNo & 1) == 0);
6665+
SmallVector<SDValue> DstPairs;
6666+
EVT SrcEleVT = SrcVT.getVectorElementType();
6667+
EVT DstEleVT = DstVT.getVectorElementType();
6668+
EVT SrcPairVT = EVT::getVectorVT(*DAG.getContext(), SrcEleVT, 2);
6669+
EVT DstPairVT = EVT::getVectorVT(*DAG.getContext(), DstEleVT, 2);
6670+
for (unsigned i = 0; i != EleNo; i += 2) {
6671+
SDValue SrcPair = DAG.getNode(ISD::EXTRACT_SUBVECTOR, SL, SrcPairVT, Src,
6672+
DAG.getConstant(i, SL, MVT::i32));
6673+
SDValue SatPk =
6674+
DAG.getNode(AMDGPUISD::SAT_PK_CAST, SL, MVT::i16, SrcPair);
6675+
SDValue DstPair = DAG.getNode(ISD::BITCAST, SL, DstPairVT, SatPk);
6676+
DstPairs.push_back(DstPair);
6677+
}
6678+
SDValue Op = DAG.getNode(ISD::CONCAT_VECTORS, SL, DstVT, DstPairs);
6679+
Results.push_back(Op);
66796680
break;
66806681
}
66816682
default:

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