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[ARM] Use SelectonDAG::getSignedConstant.
1 parent f7d94b7 commit efa859c

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4 files changed

+42
-28
lines changed

4 files changed

+42
-28
lines changed

‎llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp‎

Lines changed: 30 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -712,7 +712,8 @@ bool ARMDAGToDAGISel::SelectAddrModeImm12(SDValue N,
712712
Base = CurDAG->getTargetFrameIndex(
713713
FI, TLI->getPointerTy(CurDAG->getDataLayout()));
714714
}
715-
OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
715+
OffImm = CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
716+
/*isTarget=*/true);
716717
return true;
717718
}
718719
}
@@ -881,7 +882,8 @@ bool ARMDAGToDAGISel::SelectAddrMode2OffsetImmPre(SDNode *Op, SDValue N,
881882
if (isScaledConstantInRange(N, /*Scale=*/1, 0, 0x1000, Val)) { // 12 bits.
882883
if (AddSub == ARM_AM::sub) Val *= -1;
883884
Offset = CurDAG->getRegister(0, MVT::i32);
884-
Opc = CurDAG->getTargetConstant(Val, SDLoc(Op), MVT::i32);
885+
Opc =
886+
CurDAG->getSignedConstant(Val, SDLoc(Op), MVT::i32, /*isTarget*/ true);
885887
return true;
886888
}
887889

@@ -1185,7 +1187,8 @@ ARMDAGToDAGISel::SelectThumbAddrModeImm5S(SDValue N, unsigned Scale,
11851187
int RHSC;
11861188
if (isScaledConstantInRange(N.getOperand(1), Scale, 0, 32, RHSC)) {
11871189
Base = N.getOperand(0);
1188-
OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
1190+
OffImm =
1191+
CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32, /*isTarget=*/true);
11891192
return true;
11901193
}
11911194

@@ -1247,7 +1250,8 @@ bool ARMDAGToDAGISel::SelectThumbAddrModeSP(SDValue N,
12471250
if (MFI.getObjectAlign(FI) >= Align(4)) {
12481251
Base = CurDAG->getTargetFrameIndex(
12491252
FI, TLI->getPointerTy(CurDAG->getDataLayout()));
1250-
OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
1253+
OffImm = CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
1254+
/*isTarget=*/true);
12511255
return true;
12521256
}
12531257
}
@@ -1267,8 +1271,8 @@ bool ARMDAGToDAGISel::SelectTAddrModeImm7(SDValue N, SDValue &Base,
12671271
Base = N.getOperand(0);
12681272
if (N.getOpcode() == ISD::SUB)
12691273
RHSC = -RHSC;
1270-
OffImm =
1271-
CurDAG->getTargetConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32);
1274+
OffImm = CurDAG->getSignedConstant(RHSC * (1 << Shift), SDLoc(N),
1275+
MVT::i32, /*isTarget=*/true);
12721276
return true;
12731277
}
12741278
}
@@ -1330,7 +1334,8 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm12(SDValue N,
13301334
Base = CurDAG->getTargetFrameIndex(
13311335
FI, TLI->getPointerTy(CurDAG->getDataLayout()));
13321336
}
1333-
OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
1337+
OffImm = CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
1338+
/*isTarget=*/true);
13341339
return true;
13351340
}
13361341
}
@@ -1357,7 +1362,8 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue N, SDValue &Base,
13571362
if (N.getOpcode() == ISD::SUB)
13581363
RHSC = -RHSC;
13591364
OffImm =
1360-
CurDAG->getTargetConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32);
1365+
CurDAG->getSignedConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32,
1366+
/*isTarget=*/true);
13611367
return true;
13621368
}
13631369
}
@@ -1387,7 +1393,8 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue N,
13871393
Base = CurDAG->getTargetFrameIndex(
13881394
FI, TLI->getPointerTy(CurDAG->getDataLayout()));
13891395
}
1390-
OffImm = CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32);
1396+
OffImm = CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
1397+
/*isTarget=*/true);
13911398
return true;
13921399
}
13931400
}
@@ -1404,8 +1411,10 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm8Offset(SDNode *Op, SDValue N,
14041411
int RHSC;
14051412
if (isScaledConstantInRange(N, /*Scale=*/1, 0, 0x100, RHSC)) { // 8 bits.
14061413
OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC))
1407-
? CurDAG->getTargetConstant(RHSC, SDLoc(N), MVT::i32)
1408-
: CurDAG->getTargetConstant(-RHSC, SDLoc(N), MVT::i32);
1414+
? CurDAG->getSignedConstant(RHSC, SDLoc(N), MVT::i32,
1415+
/*isTarget=*/true)
1416+
: CurDAG->getSignedConstant(-RHSC, SDLoc(N), MVT::i32,
1417+
/*isTarget=*/true);
14091418
return true;
14101419
}
14111420

@@ -1428,8 +1437,8 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm7(SDValue N, SDValue &Base,
14281437

14291438
if (N.getOpcode() == ISD::SUB)
14301439
RHSC = -RHSC;
1431-
OffImm =
1432-
CurDAG->getTargetConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32);
1440+
OffImm = CurDAG->getSignedConstant(RHSC * (1 << Shift), SDLoc(N),
1441+
MVT::i32, /*isTarget=*/true);
14331442
return true;
14341443
}
14351444
}
@@ -1471,11 +1480,11 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm7Offset(SDNode *Op, SDValue N,
14711480
int RHSC;
14721481
// 7 bit constant, shifted by Shift.
14731482
if (isScaledConstantInRange(N, 1 << Shift, 0, 0x80, RHSC)) {
1474-
OffImm =
1475-
((AM == ISD::PRE_INC) || (AM == ISD::POST_INC))
1476-
? CurDAG->getTargetConstant(RHSC * (1 << Shift), SDLoc(N), MVT::i32)
1477-
: CurDAG->getTargetConstant(-RHSC * (1 << Shift), SDLoc(N),
1478-
MVT::i32);
1483+
OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC))
1484+
? CurDAG->getSignedConstant(RHSC * (1 << Shift), SDLoc(N),
1485+
MVT::i32, /*isTarget=*/true)
1486+
: CurDAG->getSignedConstant(-RHSC * (1 << Shift), SDLoc(N),
1487+
MVT::i32, /*isTarget=*/true);
14791488
return true;
14801489
}
14811490
return false;
@@ -1485,7 +1494,8 @@ template <int Min, int Max>
14851494
bool ARMDAGToDAGISel::SelectImmediateInRange(SDValue N, SDValue &OffImm) {
14861495
int Val;
14871496
if (isScaledConstantInRange(N, 1, Min, Max, Val)) {
1488-
OffImm = CurDAG->getTargetConstant(Val, SDLoc(N), MVT::i32);
1497+
OffImm =
1498+
CurDAG->getSignedConstant(Val, SDLoc(N), MVT::i32, /*isTarget=*/true);
14891499
return true;
14901500
}
14911501
return false;
@@ -3861,8 +3871,7 @@ void ARMDAGToDAGISel::Select(SDNode *N) {
38613871
ConstantMaterializationCost(~Imm, Subtarget)) {
38623872
// The current immediate costs more to materialize than a negated
38633873
// immediate, so negate the immediate and use a BIC.
3864-
SDValue NewImm =
3865-
CurDAG->getConstant(~N1C->getZExtValue(), dl, MVT::i32);
3874+
SDValue NewImm = CurDAG->getConstant(~Imm, dl, MVT::i32);
38663875
// If the new constant didn't exist before, reposition it in the topological
38673876
// ordering so it is just before N. Otherwise, don't touch its location.
38683877
if (NewImm->getNodeId() == -1)

‎llvm/lib/Target/ARM/ARMISelLowering.cpp‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2841,7 +2841,8 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
28412841
Ops.push_back(Callee);
28422842

28432843
if (isTailCall) {
2844-
Ops.push_back(DAG.getTargetConstant(SPDiff, dl, MVT::i32));
2844+
Ops.push_back(
2845+
DAG.getSignedConstant(SPDiff, dl, MVT::i32, /*isTarget=*/true));
28452846
}
28462847

28472848
// Add argument registers to the end of the list so that they are known live
@@ -2892,7 +2893,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
28922893
// we need to undo that after it returns to restore the status-quo.
28932894
bool TailCallOpt = getTargetMachine().Options.GuaranteedTailCallOpt;
28942895
uint64_t CalleePopBytes =
2895-
canGuaranteeTCO(CallConv, TailCallOpt) ? alignTo(NumBytes, 16) : -1ULL;
2896+
canGuaranteeTCO(CallConv, TailCallOpt) ? alignTo(NumBytes, 16) : -1U;
28962897

28972898
Chain = DAG.getCALLSEQ_END(Chain, NumBytes, CalleePopBytes, InGlue, dl);
28982899
if (!Ins.empty())
@@ -8551,7 +8552,7 @@ static SDValue LowerVECTOR_SHUFFLEv8i8(SDValue Op,
85518552

85528553
SmallVector<SDValue, 8> VTBLMask;
85538554
for (int I : ShuffleMask)
8554-
VTBLMask.push_back(DAG.getConstant(I, DL, MVT::i32));
8555+
VTBLMask.push_back(DAG.getSignedConstant(I, DL, MVT::i32));
85558556

85568557
if (V2.getNode()->isUndef())
85578558
return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1,
@@ -20671,7 +20672,8 @@ void ARMTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
2067120672
}
2067220673
return;
2067320674
}
20674-
Result = DAG.getTargetConstant(CVal, SDLoc(Op), Op.getValueType());
20675+
Result = DAG.getSignedConstant(CVal, SDLoc(Op), Op.getValueType(),
20676+
/*isTarget=*/true);
2067520677
break;
2067620678
}
2067720679

‎llvm/lib/Target/ARM/ARMInstrInfo.td‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -371,12 +371,14 @@ def ARMVCCElse : PatLeaf<(i32 2)>;
371371

372372
// imm_neg_XFORM - Return the negation of an i32 immediate value.
373373
def imm_neg_XFORM : SDNodeXForm<imm, [{
374-
return CurDAG->getTargetConstant(-(int)N->getZExtValue(), SDLoc(N), MVT::i32);
374+
return CurDAG->getSignedConstant(-(int)N->getZExtValue(), SDLoc(N), MVT::i32,
375+
/*isTarget=*/true);
375376
}]>;
376377

377378
// imm_not_XFORM - Return the complement of a i32 immediate value.
378379
def imm_not_XFORM : SDNodeXForm<imm, [{
379-
return CurDAG->getTargetConstant(~(int)N->getZExtValue(), SDLoc(N), MVT::i32);
380+
return CurDAG->getSignedConstant(~(int)N->getZExtValue(), SDLoc(N), MVT::i32,
381+
/*isTarget=*/true);
380382
}]>;
381383
def gi_imm_not_XFORM : GICustomOperandRenderer<"renderInvertedImm">,
382384
GISDNodeXFormEquiv<imm_not_XFORM>;

‎llvm/lib/Target/X86/X86ISelLoweringCall.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2426,7 +2426,8 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
24262426
Ops.push_back(Callee);
24272427

24282428
if (isTailCall)
2429-
Ops.push_back(DAG.getTargetConstant(FPDiff, dl, MVT::i32));
2429+
Ops.push_back(
2430+
DAG.getSignedConstant(FPDiff, dl, MVT::i32, /*isTarget=*/true));
24302431

24312432
// Add argument registers to the end of the list so that they are known live
24322433
// into the call.

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