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[PPC][BOLT] clang-format
1 parent 792ed13 commit efd806e

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2 files changed

+22
-22
lines changed

2 files changed

+22
-22
lines changed

bolt/include/bolt/Core/MCPlusBuilder.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2374,9 +2374,9 @@ MCPlusBuilder *createRISCVMCPlusBuilder(const MCInstrAnalysis *,
23742374
const MCSubtargetInfo *);
23752375

23762376
MCPlusBuilder *createPowerPCMCPlusBuilder(const MCInstrAnalysis *,
2377-
const MCInstrInfo *,
2378-
const MCRegisterInfo *,
2379-
const MCSubtargetInfo *);
2377+
const MCInstrInfo *,
2378+
const MCRegisterInfo *,
2379+
const MCSubtargetInfo *);
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23812381
} // namespace bolt
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} // namespace llvm

bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -21,25 +21,26 @@
2121
namespace llvm {
2222
namespace bolt {
2323

24-
class PPCMCPlusBuilder : public MCPlusBuilder{
24+
class PPCMCPlusBuilder : public MCPlusBuilder {
2525
public:
26-
using MCPlusBuilder::MCPlusBuilder;
27-
28-
// Create instructions to push two registers onto the stack
29-
static void createPushRegisters(MCInst &Inst1, MCInst &Inst2, MCPhysReg Reg1, MCPhysReg /*Reg2*/){
30-
31-
Inst1.clear();
32-
Inst1.setOpcode(PPC::STDU);
33-
Inst1.addOperand(MCOperand::createReg(PPC::R1)); // destination (SP)
34-
Inst1.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
35-
Inst1.addOperand(MCOperand::createImm(-16)); // offset
36-
37-
Inst2.clear();
38-
Inst2.setOpcode(PPC::STD);
39-
Inst2.addOperand(MCOperand::createReg(Reg1)); // source register
40-
Inst2.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
41-
Inst2.addOperand(MCOperand::createImm(0)); // offset
42-
}
26+
using MCPlusBuilder::MCPlusBuilder;
27+
28+
// Create instructions to push two registers onto the stack
29+
static void createPushRegisters(MCInst &Inst1, MCInst &Inst2, MCPhysReg Reg1,
30+
MCPhysReg /*Reg2*/) {
31+
32+
Inst1.clear();
33+
Inst1.setOpcode(PPC::STDU);
34+
Inst1.addOperand(MCOperand::createReg(PPC::R1)); // destination (SP)
35+
Inst1.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
36+
Inst1.addOperand(MCOperand::createImm(-16)); // offset
37+
38+
Inst2.clear();
39+
Inst2.setOpcode(PPC::STD);
40+
Inst2.addOperand(MCOperand::createReg(Reg1)); // source register
41+
Inst2.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
42+
Inst2.addOperand(MCOperand::createImm(0)); // offset
43+
}
4344
};
4445

4546
MCPlusBuilder *createPowerPCMCPlusBuilder(const MCInstrAnalysis *Analysis,
@@ -51,4 +52,3 @@ MCPlusBuilder *createPowerPCMCPlusBuilder(const MCInstrAnalysis *Analysis,
5152

5253
} // namespace bolt
5354
} // namespace llvm
54-

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