@@ -3256,22 +3256,22 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
32563256 return EmitZTInstr(MI, BB, AArch64::MOVT_TIZ, /*Op0IsDef=*/true);
32573257
32583258 case AArch64::AUTx16x17:
3259- fixupBlendComponents (MI, BB, MI.getOperand(1), MI.getOperand(2),
3260- &AArch64::GPR64noipRegClass);
3259+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(1), MI.getOperand(2),
3260+ &AArch64::GPR64noipRegClass);
32613261 return BB;
32623262 case AArch64::AUTxMxN:
3263- fixupBlendComponents (MI, BB, MI.getOperand(4), MI.getOperand(5),
3264- &AArch64::GPR64noipRegClass);
3263+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(4), MI.getOperand(5),
3264+ &AArch64::GPR64noipRegClass);
32653265 return BB;
32663266 case AArch64::PAC:
32673267 fixupPtrauthDiscriminator(MI, BB, MI.getOperand(3), MI.getOperand(4),
32683268 &AArch64::GPR64noipRegClass);
32693269 return BB;
32703270 case AArch64::AUTPAC:
3271- fixupBlendComponents (MI, BB, MI.getOperand(1), MI.getOperand(2),
3272- &AArch64::GPR64noipRegClass);
3273- fixupBlendComponents (MI, BB, MI.getOperand(4), MI.getOperand(5),
3274- &AArch64::GPR64noipRegClass);
3271+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(1), MI.getOperand(2),
3272+ &AArch64::GPR64noipRegClass);
3273+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(4), MI.getOperand(5),
3274+ &AArch64::GPR64noipRegClass);
32753275 return BB;
32763276 }
32773277}
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