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1 parent d760dbe commit f1025c0Copy full SHA for f1025c0
mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
@@ -301,7 +301,7 @@ LogicalResult TensorDescType::verify(
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// For 1D tensor, pad the shape with an outer unit dimension to allow common
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// validation logic.
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- SmallVector<int64_t> tensorShape(shape.begin(), shape.end());
+ SmallVector<int64_t> tensorShape(shape);
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if (rank == 1)
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tensorShape = {1, tensorShape.back()};
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