@@ -2545,18 +2545,11 @@ void mlir::populateAMDGPUToROCDLConversionPatterns(LLVMTypeConverter &converter,
25452545 AMDGPUDPPLowering, MemoryCounterWaitOpLowering, LDSBarrierOpLowering,
25462546 SchedBarrierOpLowering, MFMAOpLowering, ScaledMFMAOpLowering,
25472547 WMMAOpLowering, ScaledWMMAOpLowering, ExtPackedFp8OpLowering,
2548- <<<<<<< HEAD
25492548 ScaledExtPacked816OpLowering,
25502549 ScaledExtPackedOpLowering, PackedScaledTruncOpLowering,
25512550 PackedTrunc2xFp8OpLowering, PackedStochRoundFp8OpLowering,
25522551 GatherToLDSOpLowering, TransposeLoadOpLowering,
25532552 AMDGPUPermlaneLowering, AMDGPUMakeDmaBaseLowering>(converter,
25542553 chipset);
2555- =======
2556- ScaledExtPacked816OpLowering, ScaledExtPackedOpLowering,
2557- PackedScaledTruncOpLowering, PackedTrunc2xFp8OpLowering,
2558- PackedStochRoundFp8OpLowering, GatherToLDSOpLowering,
2559- TransposeLoadOpLowering, AMDGPUPermlaneLowering>(converter, chipset);
2560- >>>>>>> Clang-format
25612554 patterns.add <AMDGPUSwizzleBitModeLowering>(converter);
25622555}
0 commit comments