[XCore,test] Change llc -march= to -mtriple=

MaskRay · MaskRay · commit f1987c74ee56 · 2024-12-15T10:31:38.000-08:00
Similar to 806761a -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple (e.g. Windows, macOS), leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize xcore-apple-darwin as ELF instead of rejecting it outrightly.
diff --git a/llvm/test/CodeGen/XCore/2008-11-17-Shl64.ll b/llvm/test/CodeGen/XCore/2008-11-17-Shl64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore > %t1.s
+; RUN: llc < %s -mtriple=xcore > %t1.s
 ; PR3080
 define i64 @test(i64 %a) {
 	%result = shl i64 %a, 1
diff --git a/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll b/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore > %t1.s
+; RUN: llc < %s -mtriple=xcore > %t1.s
 ;; This caused a compilation failure since the
 ;; address arithmetic was folded into the LDWSP instruction,
 ;; resulting in a negative offset which eliminateFrameIndex was
diff --git a/llvm/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll b/llvm/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore > %t1.s
+; RUN: llc < %s -mtriple=xcore > %t1.s
 ; PR3324
 define double @f1(double %a, double %b, double %c, double %d, double %e, double %f, double %g) nounwind {
 entry:
diff --git a/llvm/test/CodeGen/XCore/2009-03-27-v2f64-param.ll b/llvm/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
 ; PR3898
 
 define i32 @vector_param(<2 x double> %x) nounwind {
diff --git a/llvm/test/CodeGen/XCore/2009-07-15-store192.ll b/llvm/test/CodeGen/XCore/2009-07-15-store192.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore > %t1.s
+; RUN: llc < %s -mtriple=xcore > %t1.s
 define void @store32(ptr %p) nounwind {
 entry:
 	store i192 0, ptr %p, align 4
diff --git a/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll b/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
 target triple = "xcore-xmos-elf"
 
diff --git a/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll b/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
 %struct.st = type <{ i8, i32, i8, i32, i8, i32 }>
 
 @x = external global %struct.st, align 4
diff --git a/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll b/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 declare void @g()
 declare ptr @llvm.stacksave() nounwind
diff --git a/llvm/test/CodeGen/XCore/DbgValueOtherTargets.test b/llvm/test/CodeGen/XCore/DbgValueOtherTargets.test
@@ -1 +1 @@
-RUN: llc -O0 -march=xcore -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
+RUN: llc -O0 -mtriple=xcore -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
diff --git a/llvm/test/CodeGen/XCore/addsub64.ll b/llvm/test/CodeGen/XCore/addsub64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 define i64 @add64(i64 %a, i64 %b) {
 	%result = add i64 %a, %b
 	ret i64 %result
diff --git a/llvm/test/CodeGen/XCore/aliases.ll b/llvm/test/CodeGen/XCore/aliases.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 define void @a_val() nounwind {
   ret void
 }
diff --git a/llvm/test/CodeGen/XCore/align.ll b/llvm/test/CodeGen/XCore/align.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 ; CHECK: .p2align 2
 ; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/XCore/alignment.ll b/llvm/test/CodeGen/XCore/alignment.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc < %s -march=xcore 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=xcore 2>&1 | FileCheck %s
 
 ; CHECK: emitPrologue unsupported alignment: 8
 define void @f() nounwind {
diff --git a/llvm/test/CodeGen/XCore/ashr.ll b/llvm/test/CodeGen/XCore/ashr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -asm-verbose=0 | FileCheck %s
 define i32 @ashr(i32 %a, i32 %b) nounwind {
 	%1 = ashr i32 %a, %b
 	ret i32 %1
diff --git a/llvm/test/CodeGen/XCore/atomic.ll b/llvm/test/CodeGen/XCore/atomic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 ; CHECK-LABEL: atomic_fence
 ; CHECK: #MEMBARRIER
diff --git a/llvm/test/CodeGen/XCore/basictest.ll b/llvm/test/CodeGen/XCore/basictest.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
 
 define i32 @test(i32 %X) {
 	%tmp.1 = add i32 %X, 1
diff --git a/llvm/test/CodeGen/XCore/bigstructret.ll b/llvm/test/CodeGen/XCore/bigstructret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 %0 = type { i32, i32, i32, i32 }
 %1 = type { i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/XCore/bitrev.ll b/llvm/test/CodeGen/XCore/bitrev.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 declare i8 @llvm.bitreverse.i8(i8)
 declare i16 @llvm.bitreverse.i16(i16)
diff --git a/llvm/test/CodeGen/XCore/byVal.ll b/llvm/test/CodeGen/XCore/byVal.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 ; CHECK-LABEL: f0Test
 ; CHECK: entsp 1
diff --git a/llvm/test/CodeGen/XCore/call.ll b/llvm/test/CodeGen/XCore/call.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 ; CHECK-LABEL: bl_imm:
 ; CHECK: ldw [[R0:r[0-9]+]], cp
diff --git a/llvm/test/CodeGen/XCore/constants.ll b/llvm/test/CodeGen/XCore/constants.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -mcpu=xs1b-generic | FileCheck %s
 
 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
 ; CHECK: .LCPI0_0:
diff --git a/llvm/test/CodeGen/XCore/events.ll b/llvm/test/CodeGen/XCore/events.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 declare void @llvm.xcore.setv.p1(ptr addrspace(1) %r, ptr %p)
 declare ptr @llvm.xcore.waitevent()
diff --git a/llvm/test/CodeGen/XCore/exception.ll b/llvm/test/CodeGen/XCore/exception.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 declare void @g()
 declare i32 @__gxx_personality_v0(...)
diff --git a/llvm/test/CodeGen/XCore/fneg.ll b/llvm/test/CodeGen/XCore/fneg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 define i1 @test(double %F, double %G) nounwind {
 entry:
 ; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/XCore/getid.ll b/llvm/test/CodeGen/XCore/getid.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 declare i32 @llvm.xcore.getid()
 
 define i32 @test() {
diff --git a/llvm/test/CodeGen/XCore/globals.ll b/llvm/test/CodeGen/XCore/globals.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
-; RUN: llc -march=xcore -mcpu=xs1b-generic -filetype=null %s
+; RUN: llc < %s -mtriple=xcore -mcpu=xs1b-generic | FileCheck %s
+; RUN: llc -mtriple=xcore -mcpu=xs1b-generic -filetype=null %s
 
 define ptr @addr_G1() {
 entry:
diff --git a/llvm/test/CodeGen/XCore/indirectbr.ll b/llvm/test/CodeGen/XCore/indirectbr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 @nextaddr = global ptr null                       ; <ptr> [#uses=2]
 @C.0.2070 = private constant [5 x ptr] [ptr blockaddress(@foo, %L1), ptr blockaddress(@foo, %L2), ptr blockaddress(@foo, %L3), ptr blockaddress(@foo, %L4), ptr blockaddress(@foo, %L5)] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/XCore/inline-asm.ll b/llvm/test/CodeGen/XCore/inline-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 ; CHECK-LABEL: f1:
 ; CHECK: foo r0
 define i32 @f1() nounwind {
diff --git a/llvm/test/CodeGen/XCore/inlineasm-output-template.ll b/llvm/test/CodeGen/XCore/inlineasm-output-template.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
 
 ; Test that %c works with immediates
 ; CHECK-LABEL: test_inlineasm_c_output_template0
diff --git a/llvm/test/CodeGen/XCore/ladd_lsub_combine.ll b/llvm/test/CodeGen/XCore/ladd_lsub_combine.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
 
 ; Only needs one ladd
 define i64 @f1(i32 %x, i32 %y) nounwind {
diff --git a/llvm/test/CodeGen/XCore/licm-ldwcp.ll b/llvm/test/CodeGen/XCore/licm-ldwcp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -asm-verbose=0 | FileCheck %s
 
 ; MachineLICM should hoist the LDWCP out of the loop.
 
diff --git a/llvm/test/CodeGen/XCore/linkage.ll b/llvm/test/CodeGen/XCore/linkage.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 ; CHECK: .weak fd
 define weak void @fd() {
diff --git a/llvm/test/CodeGen/XCore/llvm-intrinsics.ll b/llvm/test/CodeGen/XCore/llvm-intrinsics.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-; RUN: llc < %s -march=xcore -frame-pointer=all | FileCheck %s -check-prefix=CHECKFP
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -frame-pointer=all | FileCheck %s -check-prefix=CHECKFP
 
 declare ptr @llvm.frameaddress(i32) nounwind readnone
 declare ptr @llvm.returnaddress(i32) nounwind
diff --git a/llvm/test/CodeGen/XCore/load.ll b/llvm/test/CodeGen/XCore/load.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 define i32 @load32(ptr %p, i32 %offset) nounwind {
 entry:
diff --git a/llvm/test/CodeGen/XCore/memcpy.ll b/llvm/test/CodeGen/XCore/memcpy.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 ; Optimize memcpy to __memcpy_4 if src, dst and size are all 4 byte aligned.
 define void @f1(ptr %dst, ptr %src, i32 %n) nounwind {
diff --git a/llvm/test/CodeGen/XCore/misc-intrinsics.ll b/llvm/test/CodeGen/XCore/misc-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 %0 = type { i32, i32 }
 
 declare i32 @llvm.xcore.bitrev(i32)
diff --git a/llvm/test/CodeGen/XCore/mkmsk.ll b/llvm/test/CodeGen/XCore/mkmsk.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 define i32 @f(i32) nounwind {
 ; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/XCore/mul64.ll b/llvm/test/CodeGen/XCore/mul64.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-; RUN: llc < %s -march=xcore -regalloc=basic | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -regalloc=basic | FileCheck %s
 define i64 @umul_lohi(i32 %a, i32 %b) {
 entry:
 	%0 = zext i32 %a to i64
diff --git a/llvm/test/CodeGen/XCore/offset_folding.ll b/llvm/test/CodeGen/XCore/offset_folding.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 @a = external dso_local constant [0 x i32], section ".cp.rodata"
 @b = external dso_local global [0 x i32]
diff --git a/llvm/test/CodeGen/XCore/private.ll b/llvm/test/CodeGen/XCore/private.ll
@@ -1,6 +1,6 @@
 ; Test to make sure that the 'private' is used correctly.
 ;
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 define private void @foo() {
 ; CHECK: .Lfoo:
diff --git a/llvm/test/CodeGen/XCore/ps-intrinsics.ll b/llvm/test/CodeGen/XCore/ps-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 declare i32 @llvm.xcore.getps(i32)
 declare void @llvm.xcore.setps(i32, i32)
 
diff --git a/llvm/test/CodeGen/XCore/resources.ll b/llvm/test/CodeGen/XCore/resources.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
 
 declare ptr addrspace(1) @llvm.xcore.getr.p1(i32 %type)
 declare void @llvm.xcore.freer.p1(ptr addrspace(1) %r)
diff --git a/llvm/test/CodeGen/XCore/resources_combine.ll b/llvm/test/CodeGen/XCore/resources_combine.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
 
 declare i32 @llvm.xcore.int.p1(ptr addrspace(1) %r)
 declare i32 @llvm.xcore.inct.p1(ptr addrspace(1) %r)
diff --git a/llvm/test/CodeGen/XCore/section-name.ll b/llvm/test/CodeGen/XCore/section-name.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=xcore -o /dev/null 2>&1 | FileCheck %s
+; RUN: not llc < %s -mtriple=xcore -o /dev/null 2>&1 | FileCheck %s
 
 @bar = internal global i32 zeroinitializer
 
diff --git a/llvm/test/CodeGen/XCore/sext.ll b/llvm/test/CodeGen/XCore/sext.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 define i32 @sext1(i32 %a) {
 	%1 = trunc i32 %a to i1
 	%2 = sext i1 %1 to i32
diff --git a/llvm/test/CodeGen/XCore/shedulingPreference.ll b/llvm/test/CodeGen/XCore/shedulingPreference.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
 
 define void @f( ) {
 entry:
diff --git a/llvm/test/CodeGen/XCore/sr-intrinsics.ll b/llvm/test/CodeGen/XCore/sr-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 declare void @llvm.xcore.setsr(i32)
 declare void @llvm.xcore.clrsr(i32)
 
diff --git a/llvm/test/CodeGen/XCore/store.ll b/llvm/test/CodeGen/XCore/store.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 define void @store32(ptr %p, i32 %offset, i32 %val) nounwind {
 entry:
diff --git a/llvm/test/CodeGen/XCore/switch.ll b/llvm/test/CodeGen/XCore/switch.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
 
 define i32 @switch(i32 %i) {
 entry:
diff --git a/llvm/test/CodeGen/XCore/switch_long.ll b/llvm/test/CodeGen/XCore/switch_long.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
 
 define i32 @switch(i32 %i) {
 entry:
diff --git a/llvm/test/CodeGen/XCore/tls.ll b/llvm/test/CodeGen/XCore/tls.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -mcpu=xs1b-generic | FileCheck %s
 
 define ptr @addr_G() {
 entry:
diff --git a/llvm/test/CodeGen/XCore/trampoline.ll b/llvm/test/CodeGen/XCore/trampoline.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 %struct.FRAME.f = type { i32, ptr }
 
diff --git a/llvm/test/CodeGen/XCore/trap.ll b/llvm/test/CodeGen/XCore/trap.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 define i32 @test() noreturn nounwind  {
 entry:
 ; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/XCore/unaligned_load.ll b/llvm/test/CodeGen/XCore/unaligned_load.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 ; Byte aligned load.
 ; CHECK: align1
diff --git a/llvm/test/CodeGen/XCore/unaligned_store.ll b/llvm/test/CodeGen/XCore/unaligned_store.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 ; Byte aligned store.
 ; CHECK-LABEL: align1:
diff --git a/llvm/test/CodeGen/XCore/unaligned_store_combine.ll b/llvm/test/CodeGen/XCore/unaligned_store_combine.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 ; Unaligned load / store pair. Should be combined into a memmove
 ; of size 8
diff --git a/llvm/test/CodeGen/XCore/varargs.ll b/llvm/test/CodeGen/XCore/varargs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
 
 define void @_Z1fz(...) {
 entry:
diff --git a/llvm/test/CodeGen/XCore/zext.ll b/llvm/test/CodeGen/XCore/zext.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
 
 define i32 @f(i1 %a) {
 entry:
diff --git a/llvm/test/CodeGen/XCore/zextfree.ll b/llvm/test/CodeGen/XCore/zextfree.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
 
 ; CHECK-LABEL: test:
 ; CHECK-NOT: zext

Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-; RUN: llc < %s -march=xcore > %t1.s`
	`1`	`+; RUN: llc < %s -mtriple=xcore > %t1.s`
`2`	`2`	`; PR3080`
`3`	`3`	`define i64 @test(i64 %a) {`
`4`	`4`	`%result = shl i64 %a, 1`
Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-; RUN: llc < %s -march=xcore`
	`1`	`+; RUN: llc < %s -mtriple=xcore`
`2`	`2`	`; PR3898`
`3`	`3`
`4`	`4`	`define i32 @vector_param(<2 x double> %x) nounwind {`
Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-; RUN: llc < %s -march=xcore \| FileCheck %s`
	`1`	`+; RUN: llc < %s -mtriple=xcore \| FileCheck %s`
`2`	`2`
`3`	`3`	`declare void @g()`
`4`	`4`	`declare ptr @llvm.stacksave() nounwind`
Original file line number	Diff line number	Diff line change
`@@ -1 +1 @@`
`1`		`-RUN: llc -O0 -march=xcore -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll \| FileCheck %S/../Inputs/DbgValueOtherTargets.ll`
	`1`	`+RUN: llc -O0 -mtriple=xcore -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll \| FileCheck %S/../Inputs/DbgValueOtherTargets.ll`