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[RISCV] Handle 'c.addi x0, $imm' alias for c.nop using PseudoC_ADDI_NOP. (#150719)
Add a missing tied constraint to PseudoC_ADDI_NOP. It seemed better to handle all the c.addi aliases for c.nop in one place.
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3 files changed

+13
-11
lines changed

3 files changed

+13
-11
lines changed

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3849,9 +3849,14 @@ bool RISCVAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
38493849
switch (Inst.getOpcode()) {
38503850
default:
38513851
break;
3852-
case RISCV::PseudoC_ADDI_NOP:
3853-
emitToStreamer(Out, MCInstBuilder(RISCV::C_NOP));
3852+
case RISCV::PseudoC_ADDI_NOP: {
3853+
if (Inst.getOperand(2).getImm() == 0)
3854+
emitToStreamer(Out, MCInstBuilder(RISCV::C_NOP));
3855+
else
3856+
emitToStreamer(
3857+
Out, MCInstBuilder(RISCV::C_NOP_HINT).addOperand(Inst.getOperand(2)));
38543858
return false;
3859+
}
38553860
case RISCV::PseudoLLAImm:
38563861
case RISCV::PseudoLAImm:
38573862
case RISCV::PseudoLI: {

llvm/lib/Target/RISCV/RISCVInstrInfoC.td

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -408,11 +408,13 @@ def C_ADDI : RVInst16CI<0b000, 0b01, (outs GPRNoX0:$rd_wb),
408408
let Constraints = "$rd = $rd_wb";
409409
}
410410

411-
// Alternate syntax for c.nop. Converted to C_NOP by the assembler.
411+
// Alternate syntax for c.nop. Converted to C_NOP/C_NOP_HINT by the assembler.
412412
let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0,
413413
isAsmParserOnly = 1 in
414-
def PseudoC_ADDI_NOP : Pseudo<(outs GPRX0:$rd), (ins GPRX0:$rs1, immzero:$imm),
415-
[], "c.addi", "$rd, $imm">;
414+
def PseudoC_ADDI_NOP : Pseudo<(outs GPRX0:$rd), (ins GPRX0:$rs1, simm6:$imm),
415+
[], "c.addi", "$rd, $imm"> {
416+
let Constraints = "$rs1 = $rd";
417+
}
416418

417419
let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCall = 1,
418420
DecoderNamespace = "RV32Only", Defs = [X1],
@@ -650,11 +652,6 @@ def C_SRAI64_HINT : RVInst16CB<0b100, 0b01, (outs GPRC:$rd),
650652
// Assembler Pseudo Instructions
651653
//===----------------------------------------------------------------------===//
652654

653-
let Predicates = [HasStdExtZca] in {
654-
// Just a different syntax for the c.nop hint: c.addi x0, simm6 vs c.nop simm6.
655-
def : InstAlias<"c.addi x0, $imm", (C_NOP_HINT simm6nonzero:$imm), 0>;
656-
}
657-
658655
let Predicates = [HasStdExtC, HasStdExtZihintntl] in {
659656
def : InstAlias<"c.ntl.p1", (C_ADD X0, X2)>;
660657
def : InstAlias<"c.ntl.pall", (C_ADD X0, X3)>;

llvm/test/MC/RISCV/rvc-hints-invalid.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55

66
c.nop 0 # CHECK: :[[@LINE]]:7: error: immediate must be non-zero in the range [-32, 31]
77

8-
c.addi x0, 33 # CHECK: :[[@LINE]]:12: error: immediate must be non-zero in the range [-32, 31]
8+
c.addi x0, 33 # CHECK: :[[@LINE]]:12: error: immediate must be an integer in the range [-32, 31]
99

1010
c.li x0, 42 # CHECK: :[[@LINE]]:10: error: immediate must be an integer in the range [-32, 31]
1111

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