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[LoongArch][NFC] Pre-commit tests for vector rotl/rotr (#161115)
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‎llvm/test/CodeGen/LoongArch/lasx/rotl-rotr.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
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; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
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define void @rotl_v32i8(ptr %dst, ptr %src, i8 signext %a0) nounwind {
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; CHECK-LABEL: rotl_v32i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvreplgr2vr.b $xr1, $a2
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; CHECK-NEXT: xvrepli.b $xr2, 8
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; CHECK-NEXT: xvsub.b $xr2, $xr2, $xr1
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; CHECK-NEXT: xvsll.b $xr1, $xr0, $xr1
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; CHECK-NEXT: xvsrl.b $xr0, $xr0, $xr2
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; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <32 x i8>, ptr %src
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%v1.ele = insertelement <32 x i8> poison, i8 %a0, i8 0
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%v1 = shufflevector <32 x i8> %v1.ele, <32 x i8> poison, <32 x i32> zeroinitializer
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%v1.sub = sub <32 x i8> splat (i8 8), %v1
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%b = shl <32 x i8> %v0, %v1
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%c = lshr <32 x i8> %v0, %v1.sub
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%d = or <32 x i8> %b, %c
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store <32 x i8> %d, ptr %dst
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ret void
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}
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define void @rotr_v32i8(ptr %dst, ptr %src, i8 signext %a0) nounwind {
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; CHECK-LABEL: rotr_v32i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvreplgr2vr.b $xr1, $a2
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; CHECK-NEXT: xvrepli.b $xr2, 8
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; CHECK-NEXT: xvsub.b $xr2, $xr2, $xr1
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; CHECK-NEXT: xvsrl.b $xr1, $xr0, $xr1
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; CHECK-NEXT: xvsll.b $xr0, $xr0, $xr2
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; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <32 x i8>, ptr %src
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%v1.ele = insertelement <32 x i8> poison, i8 %a0, i8 0
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%v1 = shufflevector <32 x i8> %v1.ele, <32 x i8> poison, <32 x i32> zeroinitializer
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%v1.sub = sub <32 x i8> splat (i8 8), %v1
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%b = lshr <32 x i8> %v0, %v1
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%c = shl <32 x i8> %v0, %v1.sub
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%d = or <32 x i8> %b, %c
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store <32 x i8> %d, ptr %dst
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ret void
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}
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define void @rotr_v32i8_imm(ptr %dst, ptr %src) nounwind {
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; CHECK-LABEL: rotr_v32i8_imm:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvsrli.b $xr1, $xr0, 2
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; CHECK-NEXT: xvslli.b $xr0, $xr0, 6
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; CHECK-NEXT: xvor.v $xr0, $xr0, $xr1
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <32 x i8>, ptr %src
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%b = lshr <32 x i8> %v0, splat (i8 2)
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%c = shl <32 x i8> %v0, splat (i8 6)
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%d = or <32 x i8> %b, %c
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store <32 x i8> %d, ptr %dst
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ret void
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}
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define void @rotl_v16i16(ptr %dst, ptr %src, i16 signext %a0) nounwind {
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; CHECK-LABEL: rotl_v16i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvreplgr2vr.h $xr1, $a2
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; CHECK-NEXT: xvrepli.h $xr2, 16
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; CHECK-NEXT: xvsub.h $xr2, $xr2, $xr1
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; CHECK-NEXT: xvsll.h $xr1, $xr0, $xr1
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; CHECK-NEXT: xvsrl.h $xr0, $xr0, $xr2
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; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <16 x i16>, ptr %src
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%v1.ele = insertelement <16 x i16> poison, i16 %a0, i16 0
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%v1 = shufflevector <16 x i16> %v1.ele, <16 x i16> poison, <16 x i32> zeroinitializer
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%v1.sub = sub <16 x i16> splat (i16 16), %v1
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%b = shl <16 x i16> %v0, %v1
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%c = lshr <16 x i16> %v0, %v1.sub
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%d = or <16 x i16> %b, %c
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store <16 x i16> %d, ptr %dst
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ret void
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}
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define void @rotr_v16i16(ptr %dst, ptr %src, i16 signext %a0) nounwind {
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; CHECK-LABEL: rotr_v16i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvreplgr2vr.h $xr1, $a2
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; CHECK-NEXT: xvrepli.h $xr2, 16
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; CHECK-NEXT: xvsub.h $xr2, $xr2, $xr1
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; CHECK-NEXT: xvsrl.h $xr1, $xr0, $xr1
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; CHECK-NEXT: xvsll.h $xr0, $xr0, $xr2
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; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <16 x i16>, ptr %src
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%v1.ele = insertelement <16 x i16> poison, i16 %a0, i16 0
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%v1 = shufflevector <16 x i16> %v1.ele, <16 x i16> poison, <16 x i32> zeroinitializer
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%v1.sub = sub <16 x i16> splat (i16 16), %v1
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%b = lshr <16 x i16> %v0, %v1
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%c = shl <16 x i16> %v0, %v1.sub
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%d = or <16 x i16> %b, %c
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store <16 x i16> %d, ptr %dst
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ret void
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}
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define void @rotr_v16i16_imm(ptr %dst, ptr %src) nounwind {
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; CHECK-LABEL: rotr_v16i16_imm:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvsrli.h $xr1, $xr0, 2
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; CHECK-NEXT: xvslli.h $xr0, $xr0, 14
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; CHECK-NEXT: xvor.v $xr0, $xr0, $xr1
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <16 x i16>, ptr %src
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%b = lshr <16 x i16> %v0, splat (i16 2)
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%c = shl <16 x i16> %v0, splat (i16 14)
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%d = or <16 x i16> %b, %c
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store <16 x i16> %d, ptr %dst
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ret void
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}
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define void @rotl_v8i32(ptr %dst, ptr %src, i32 signext %a0) nounwind {
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; CHECK-LABEL: rotl_v8i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvreplgr2vr.w $xr1, $a2
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; CHECK-NEXT: xvrepli.w $xr2, 32
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; CHECK-NEXT: xvsub.w $xr2, $xr2, $xr1
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; CHECK-NEXT: xvsll.w $xr1, $xr0, $xr1
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; CHECK-NEXT: xvsrl.w $xr0, $xr0, $xr2
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; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <8 x i32>, ptr %src
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%v1.ele = insertelement <8 x i32> poison, i32 %a0, i32 0
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%v1 = shufflevector <8 x i32> %v1.ele, <8 x i32> poison, <8 x i32> zeroinitializer
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%v1.sub = sub <8 x i32> splat (i32 32), %v1
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%b = shl <8 x i32> %v0, %v1
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%c = lshr <8 x i32> %v0, %v1.sub
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%d = or <8 x i32> %b, %c
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store <8 x i32> %d, ptr %dst
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ret void
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}
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define void @rotr_v8i32(ptr %dst, ptr %src, i32 signext %a0) nounwind {
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; CHECK-LABEL: rotr_v8i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvreplgr2vr.w $xr1, $a2
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; CHECK-NEXT: xvrepli.w $xr2, 32
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; CHECK-NEXT: xvsub.w $xr2, $xr2, $xr1
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; CHECK-NEXT: xvsrl.w $xr1, $xr0, $xr1
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; CHECK-NEXT: xvsll.w $xr0, $xr0, $xr2
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; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <8 x i32>, ptr %src
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%v1.ele = insertelement <8 x i32> poison, i32 %a0, i32 0
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%v1 = shufflevector <8 x i32> %v1.ele, <8 x i32> poison, <8 x i32> zeroinitializer
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%v1.sub = sub <8 x i32> splat (i32 32), %v1
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%b = lshr <8 x i32> %v0, %v1
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%c = shl <8 x i32> %v0, %v1.sub
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%d = or <8 x i32> %b, %c
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store <8 x i32> %d, ptr %dst
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ret void
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}
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define void @rotr_v8i32_imm(ptr %dst, ptr %src) nounwind {
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; CHECK-LABEL: rotr_v8i32_imm:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvsrli.w $xr1, $xr0, 2
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; CHECK-NEXT: xvslli.w $xr0, $xr0, 30
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; CHECK-NEXT: xvor.v $xr0, $xr0, $xr1
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <8 x i32>, ptr %src
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%b = lshr <8 x i32> %v0, splat (i32 2)
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%c = shl <8 x i32> %v0, splat (i32 30)
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%d = or <8 x i32> %b, %c
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store <8 x i32> %d, ptr %dst
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ret void
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}
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define void @rotl_v4i64(ptr %dst, ptr %src, i64 %a0) nounwind {
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; LA32-LABEL: rotl_v4i64:
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; LA32: # %bb.0:
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; LA32-NEXT: xvld $xr0, $a1, 0
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; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 0
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; LA32-NEXT: vinsgr2vr.w $vr1, $a3, 1
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; LA32-NEXT: xvreplve0.d $xr1, $xr1
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; LA32-NEXT: xvrepli.d $xr2, 64
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; LA32-NEXT: xvsub.d $xr2, $xr2, $xr1
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; LA32-NEXT: xvsll.d $xr1, $xr0, $xr1
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; LA32-NEXT: xvsrl.d $xr0, $xr0, $xr2
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; LA32-NEXT: xvor.v $xr0, $xr1, $xr0
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; LA32-NEXT: xvst $xr0, $a0, 0
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; LA32-NEXT: ret
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;
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; LA64-LABEL: rotl_v4i64:
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; LA64: # %bb.0:
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; LA64-NEXT: xvld $xr0, $a1, 0
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; LA64-NEXT: xvreplgr2vr.d $xr1, $a2
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; LA64-NEXT: xvrepli.d $xr2, 64
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; LA64-NEXT: xvsub.d $xr2, $xr2, $xr1
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; LA64-NEXT: xvsll.d $xr1, $xr0, $xr1
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; LA64-NEXT: xvsrl.d $xr0, $xr0, $xr2
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; LA64-NEXT: xvor.v $xr0, $xr1, $xr0
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; LA64-NEXT: xvst $xr0, $a0, 0
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; LA64-NEXT: ret
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%v0 = load <4 x i64>, ptr %src
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%v1.ele = insertelement <4 x i64> poison, i64 %a0, i64 0
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%v1 = shufflevector <4 x i64> %v1.ele, <4 x i64> poison, <4 x i32> zeroinitializer
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%v1.sub = sub <4 x i64> splat (i64 64), %v1
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%b = shl <4 x i64> %v0, %v1
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%c = lshr <4 x i64> %v0, %v1.sub
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%d = or <4 x i64> %b, %c
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store <4 x i64> %d, ptr %dst
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ret void
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}
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define void @rotr_v4i64(ptr %dst, ptr %src, i64 %a0) nounwind {
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; LA32-LABEL: rotr_v4i64:
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; LA32: # %bb.0:
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; LA32-NEXT: xvld $xr0, $a1, 0
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; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 0
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; LA32-NEXT: vinsgr2vr.w $vr1, $a3, 1
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; LA32-NEXT: xvreplve0.d $xr1, $xr1
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; LA32-NEXT: xvrepli.d $xr2, 64
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; LA32-NEXT: xvsub.d $xr2, $xr2, $xr1
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; LA32-NEXT: xvsrl.d $xr1, $xr0, $xr1
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; LA32-NEXT: xvsll.d $xr0, $xr0, $xr2
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; LA32-NEXT: xvor.v $xr0, $xr1, $xr0
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; LA32-NEXT: xvst $xr0, $a0, 0
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; LA32-NEXT: ret
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;
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; LA64-LABEL: rotr_v4i64:
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; LA64: # %bb.0:
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; LA64-NEXT: xvld $xr0, $a1, 0
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; LA64-NEXT: xvreplgr2vr.d $xr1, $a2
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; LA64-NEXT: xvrepli.d $xr2, 64
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; LA64-NEXT: xvsub.d $xr2, $xr2, $xr1
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; LA64-NEXT: xvsrl.d $xr1, $xr0, $xr1
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; LA64-NEXT: xvsll.d $xr0, $xr0, $xr2
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; LA64-NEXT: xvor.v $xr0, $xr1, $xr0
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; LA64-NEXT: xvst $xr0, $a0, 0
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; LA64-NEXT: ret
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%v0 = load <4 x i64>, ptr %src
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%v1.ele = insertelement <4 x i64> poison, i64 %a0, i64 0
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%v1 = shufflevector <4 x i64> %v1.ele, <4 x i64> poison, <4 x i32> zeroinitializer
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%v1.sub = sub <4 x i64> splat (i64 64), %v1
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%b = lshr <4 x i64> %v0, %v1
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%c = shl <4 x i64> %v0, %v1.sub
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%d = or <4 x i64> %b, %c
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store <4 x i64> %d, ptr %dst
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ret void
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}
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define void @rotr_v4i64_imm(ptr %dst, ptr %src) nounwind {
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; CHECK-LABEL: rotr_v4i64_imm:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvsrli.d $xr1, $xr0, 2
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; CHECK-NEXT: xvslli.d $xr0, $xr0, 62
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; CHECK-NEXT: xvor.v $xr0, $xr0, $xr1
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <4 x i64>, ptr %src
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%b = lshr <4 x i64> %v0, splat (i64 2)
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%c = shl <4 x i64> %v0, splat (i64 62)
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%d = or <4 x i64> %b, %c
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store <4 x i64> %d, ptr %dst
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ret void
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}

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