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3 files changed

+36
-11
lines changed

3 files changed

+36
-11
lines changed

clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -92,35 +92,34 @@ static mlir::Value emitX86FunnelShift(CIRGenFunction &cgf,
9292
const mlir::Location &location,
9393
mlir::Value &op0, mlir::Value &op1,
9494
mlir::Value &amt, bool isRight) {
95-
auto &builder = cgf.getBuilder();
96-
auto op0Ty = op0.getType();
95+
CIRGenBuilderTy &builder = cgf.getBuilder();
96+
mlir::Type op0Ty = op0.getType();
9797

9898
// Amount may be scalar immediate, in which case create a splat vector.
9999
// Funnel shifts amounts are treated as modulo and types are all power-of-2
100100
// so we only care about the lowest log2 bits anyway.
101101
if (amt.getType() != op0Ty) {
102102
auto vecTy = mlir::cast<cir::VectorType>(op0Ty);
103-
auto numElems = vecTy.getSize();
103+
uint64_t numElems = vecTy.getSize();
104104

105105
auto amtTy = mlir::cast<cir::IntType>(amt.getType());
106106
auto vecElemTy = mlir::cast<cir::IntType>(vecTy.getElementType());
107107

108108
// Cast to same width unsigned if not already unsigned.
109109
if (amtTy.isSigned()) {
110-
auto unsignedAmtTy = builder.getUIntNTy(amtTy.getWidth());
111-
amt = builder.createIntCast(amt,
112-
builder.getUIntNTy(unsignedAmtTy.getWidth()));
110+
cir::IntType unsignedAmtTy = builder.getUIntNTy(amtTy.getWidth());
111+
amt = builder.createIntCast(amt, unsignedAmtTy);
113112
}
114113
// Cast the unsigned `amt` to operand element type's width unsigned.
115-
auto unsingedVecElemType = builder.getUIntNTy(vecElemTy.getWidth());
116-
amt = builder.createIntCast(amt, unsingedVecElemType);
114+
cir::IntType unsignedVecElemType = builder.getUIntNTy(vecElemTy.getWidth());
115+
amt = builder.createIntCast(amt, unsignedVecElemType);
117116
amt = cir::VecSplatOp::create(
118-
builder, cgf.getLoc(e->getExprLoc()),
119-
cir::VectorType::get(unsingedVecElemType, numElems), amt);
117+
builder, location, cir::VectorType::get(unsignedVecElemType, numElems),
118+
amt);
120119
}
121120

122121
const std::string intrinsicName = isRight ? "fshr" : "fshl";
123-
return emitIntrinsicCallOp(cgf.getBuilder(), location, intrinsicName, ty,
122+
return emitIntrinsicCallOp(cgf.getBuilder(), location, intrinsicName, op0Ty,
124123
mlir::ValueRange{op0, op1, amt});
125124
}
126125

clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -77,3 +77,15 @@ __m512i test_mm512_undefined_epi32(void) {
7777
// OGCG: ret <8 x i64> zeroinitializer
7878
return _mm512_undefined_epi32();
7979
}
80+
81+
__m512i test_mm512_ror_epi32(__m512i __A) {
82+
// CHECK-LABEL: test_mm512_ror_epi32
83+
// CHECK: @llvm.fshr.v16i32
84+
return _mm512_ror_epi32(__A, 5);
85+
}
86+
87+
__m512i test_mm512_ror_epi64(__m512i __A) {
88+
// CHECK-LABEL: test_mm512_ror_epi64
89+
// CHECK: @llvm.fshr.v8i64
90+
return _mm512_ror_epi64(__A, 5);
91+
}

shell.nix

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
let
2+
nixpkgs = fetchTarball "https://github.com/NixOS/nixpkgs/tarball/nixos-24.05";
3+
pkgs = import nixpkgs { config = {}; overlays = []; };
4+
in
5+
6+
7+
pkgs.mkShellNoCC {
8+
packages = with pkgs; [
9+
cmake
10+
ninja
11+
llvmPackages_latest.llvm
12+
];
13+
stdenv = pkgs.clangStdenv;
14+
}

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