Skip to content

Commit f3762b7

Browse files
authored
[AMDGPU][AsmParser][NFC] Combine the Lit and Lit64 modifier flags. (#160315)
They represent mutually exclusive values of the same attribute.
1 parent d5f8578 commit f3762b7

File tree

1 file changed

+37
-34
lines changed

1 file changed

+37
-34
lines changed

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Lines changed: 37 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,8 @@ class AMDGPUAsmParser;
5555

5656
enum RegisterKind { IS_UNKNOWN, IS_VGPR, IS_SGPR, IS_AGPR, IS_TTMP, IS_SPECIAL };
5757

58+
enum class LitModifier { None, Lit, Lit64 };
59+
5860
//===----------------------------------------------------------------------===//
5961
// Operand
6062
//===----------------------------------------------------------------------===//
@@ -80,8 +82,7 @@ class AMDGPUOperand : public MCParsedAsmOperand {
8082
bool Abs = false;
8183
bool Neg = false;
8284
bool Sext = false;
83-
bool Lit = false;
84-
bool Lit64 = false;
85+
LitModifier Lit = LitModifier::None;
8586

8687
bool hasFPModifiers() const { return Abs || Neg; }
8788
bool hasIntModifiers() const { return Sext; }
@@ -1675,10 +1676,10 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
16751676
bool isOpcodeModifierWithVal(const AsmToken &Token, const AsmToken &NextToken) const;
16761677
bool parseSP3NegModifier();
16771678
ParseStatus parseImm(OperandVector &Operands, bool HasSP3AbsModifier = false,
1678-
bool HasLit = false, bool HasLit64 = false);
1679+
LitModifier Lit = LitModifier::None);
16791680
ParseStatus parseReg(OperandVector &Operands);
16801681
ParseStatus parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false,
1681-
bool HasLit = false, bool HasLit64 = false);
1682+
LitModifier Lit = LitModifier::None);
16821683
ParseStatus parseRegOrImmWithFPInputMods(OperandVector &Operands,
16831684
bool AllowImm = true);
16841685
ParseStatus parseRegOrImmWithIntInputMods(OperandVector &Operands,
@@ -2437,7 +2438,8 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
24372438
// truncated to uint32_t), if the target doesn't support 64-bit literals, or
24382439
// the lit modifier is explicitly used, we need to truncate it to the 32
24392440
// LSBs.
2440-
if (!AsmParser->has64BitLiterals() || getModifiers().Lit)
2441+
if (!AsmParser->has64BitLiterals() ||
2442+
getModifiers().Lit == LitModifier::Lit)
24412443
Val = Lo_32(Val);
24422444

24432445
Inst.addOperand(MCOperand::createImm(Val));
@@ -2461,8 +2463,9 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
24612463
// 1) explicitly forced by using lit modifier;
24622464
// 2) the value is a valid 32-bit representation (signed or unsigned),
24632465
// meanwhile not forced by lit64 modifier.
2464-
if (getModifiers().Lit ||
2465-
(!getModifiers().Lit64 && (isInt<32>(Val) || isUInt<32>(Val))))
2466+
if (getModifiers().Lit == LitModifier::Lit ||
2467+
(getModifiers().Lit != LitModifier::Lit64 &&
2468+
(isInt<32>(Val) || isUInt<32>(Val))))
24662469
Val = static_cast<uint64_t>(Val) << 32;
24672470
}
24682471

@@ -2484,7 +2487,8 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
24842487
return;
24852488

24862489
case AMDGPU::OPERAND_KIMM64:
2487-
if ((isInt<32>(Val) || isUInt<32>(Val)) && !getModifiers().Lit64)
2490+
if ((isInt<32>(Val) || isUInt<32>(Val)) &&
2491+
getModifiers().Lit != LitModifier::Lit64)
24882492
Val <<= 32;
24892493

24902494
Inst.addOperand(MCOperand::createImm(Val));
@@ -3167,20 +3171,22 @@ AMDGPUAsmParser::parseRegister(bool RestoreOnFailure) {
31673171
}
31683172

31693173
ParseStatus AMDGPUAsmParser::parseImm(OperandVector &Operands,
3170-
bool HasSP3AbsModifier, bool HasLit,
3171-
bool HasLit64) {
3174+
bool HasSP3AbsModifier, LitModifier Lit) {
31723175
// TODO: add syntactic sugar for 1/(2*PI)
31733176

31743177
if (isRegister() || isModifier())
31753178
return ParseStatus::NoMatch;
31763179

3177-
if (!HasLit && !HasLit64) {
3178-
HasLit64 = trySkipId("lit64");
3179-
HasLit = !HasLit64 && trySkipId("lit");
3180-
if (HasLit || HasLit64) {
3180+
if (Lit == LitModifier::None) {
3181+
if (trySkipId("lit"))
3182+
Lit = LitModifier::Lit;
3183+
else if (trySkipId("lit64"))
3184+
Lit = LitModifier::Lit64;
3185+
3186+
if (Lit != LitModifier::None) {
31813187
if (!skipToken(AsmToken::LParen, "expected left paren after lit"))
31823188
return ParseStatus::Failure;
3183-
ParseStatus S = parseImm(Operands, HasSP3AbsModifier, HasLit, HasLit64);
3189+
ParseStatus S = parseImm(Operands, HasSP3AbsModifier, Lit);
31843190
if (S.isSuccess() &&
31853191
!skipToken(AsmToken::RParen, "expected closing parentheses"))
31863192
return ParseStatus::Failure;
@@ -3201,8 +3207,7 @@ ParseStatus AMDGPUAsmParser::parseImm(OperandVector &Operands,
32013207
}
32023208

32033209
AMDGPUOperand::Modifiers Mods;
3204-
Mods.Lit = HasLit;
3205-
Mods.Lit64 = HasLit64;
3210+
Mods.Lit = Lit;
32063211

32073212
if (IsReal) {
32083213
// Floating-point expressions are not supported.
@@ -3253,7 +3258,7 @@ ParseStatus AMDGPUAsmParser::parseImm(OperandVector &Operands,
32533258
AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
32543259
Op.setModifiers(Mods);
32553260
} else {
3256-
if (HasLit || HasLit64)
3261+
if (Lit != LitModifier::None)
32573262
return ParseStatus::NoMatch;
32583263
Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
32593264
}
@@ -3277,14 +3282,13 @@ ParseStatus AMDGPUAsmParser::parseReg(OperandVector &Operands) {
32773282
}
32783283

32793284
ParseStatus AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands,
3280-
bool HasSP3AbsMod, bool HasLit,
3281-
bool HasLit64) {
3285+
bool HasSP3AbsMod, LitModifier Lit) {
32823286
ParseStatus Res = parseReg(Operands);
32833287
if (!Res.isNoMatch())
32843288
return Res;
32853289
if (isModifier())
32863290
return ParseStatus::NoMatch;
3287-
return parseImm(Operands, HasSP3AbsMod, HasLit, HasLit64);
3291+
return parseImm(Operands, HasSP3AbsMod, Lit);
32883292
}
32893293

32903294
bool
@@ -3380,7 +3384,6 @@ AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
33803384
bool AllowImm) {
33813385
bool Neg, SP3Neg;
33823386
bool Abs, SP3Abs;
3383-
bool Lit64, Lit;
33843387
SMLoc Loc;
33853388

33863389
// Disable ambiguous constructs like '--1' etc. Should use neg(-1) instead.
@@ -3400,35 +3403,36 @@ AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
34003403
if (Abs && !skipToken(AsmToken::LParen, "expected left paren after abs"))
34013404
return ParseStatus::Failure;
34023405

3403-
Lit64 = trySkipId("lit64");
3404-
if (Lit64) {
3406+
LitModifier Lit = LitModifier::None;
3407+
if (trySkipId("lit")) {
3408+
Lit = LitModifier::Lit;
3409+
if (!skipToken(AsmToken::LParen, "expected left paren after lit"))
3410+
return ParseStatus::Failure;
3411+
} else if (trySkipId("lit64")) {
3412+
Lit = LitModifier::Lit64;
34053413
if (!skipToken(AsmToken::LParen, "expected left paren after lit64"))
34063414
return ParseStatus::Failure;
34073415
if (!has64BitLiterals())
34083416
return Error(Loc, "lit64 is not supported on this GPU");
34093417
}
34103418

3411-
Lit = !Lit64 && trySkipId("lit");
3412-
if (Lit && !skipToken(AsmToken::LParen, "expected left paren after lit"))
3413-
return ParseStatus::Failure;
3414-
34153419
Loc = getLoc();
34163420
SP3Abs = trySkipToken(AsmToken::Pipe);
34173421
if (Abs && SP3Abs)
34183422
return Error(Loc, "expected register or immediate");
34193423

34203424
ParseStatus Res;
34213425
if (AllowImm) {
3422-
Res = parseRegOrImm(Operands, SP3Abs, Lit, Lit64);
3426+
Res = parseRegOrImm(Operands, SP3Abs, Lit);
34233427
} else {
34243428
Res = parseReg(Operands);
34253429
}
34263430
if (!Res.isSuccess())
3427-
return (SP3Neg || Neg || SP3Abs || Abs || Lit || Lit64)
3431+
return (SP3Neg || Neg || SP3Abs || Abs || Lit != LitModifier::None)
34283432
? ParseStatus::Failure
34293433
: Res;
34303434

3431-
if ((Lit || Lit64) && !Operands.back()->isImm())
3435+
if (Lit != LitModifier::None && !Operands.back()->isImm())
34323436
Error(Loc, "expected immediate with lit modifier");
34333437

34343438
if (SP3Abs && !skipToken(AsmToken::Pipe, "expected vertical bar"))
@@ -3437,17 +3441,16 @@ AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
34373441
return ParseStatus::Failure;
34383442
if (Neg && !skipToken(AsmToken::RParen, "expected closing parentheses"))
34393443
return ParseStatus::Failure;
3440-
if ((Lit || Lit64) &&
3444+
if (Lit != LitModifier::None &&
34413445
!skipToken(AsmToken::RParen, "expected closing parentheses"))
34423446
return ParseStatus::Failure;
34433447

34443448
AMDGPUOperand::Modifiers Mods;
34453449
Mods.Abs = Abs || SP3Abs;
34463450
Mods.Neg = Neg || SP3Neg;
34473451
Mods.Lit = Lit;
3448-
Mods.Lit64 = Lit64;
34493452

3450-
if (Mods.hasFPModifiers() || Lit || Lit64) {
3453+
if (Mods.hasFPModifiers() || Lit != LitModifier::None) {
34513454
AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
34523455
if (Op.isExpr())
34533456
return Error(Op.getStartLoc(), "expected an absolute expression");

0 commit comments

Comments
 (0)