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[AArch64] Add tests for sinking exts into muls (NFC)
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‎llvm/test/CodeGen/AArch64/sink-mul-exts.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
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define <8 x i16> @mul_splat_sext_v8i16(ptr %x, ptr %y) {
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; CHECK-LABEL: mul_splat_sext_v8i16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr d1, [x0]
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: mov x8, xzr
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; CHECK-NEXT: dup v1.8b, v1.b[3]
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; CHECK-NEXT: .LBB0_1: // %l1
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr d2, [x1, x8]
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; CHECK-NEXT: add x8, x8, #4
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; CHECK-NEXT: cmp w8, #4
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; CHECK-NEXT: smlal v0.8h, v2.8b, v1.8b
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; CHECK-NEXT: b.eq .LBB0_1
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; CHECK-NEXT: // %bb.2: // %l2
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; CHECK-NEXT: ret
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entry:
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%x.val = load <8 x i8>, ptr %x
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%x.ext = sext <8 x i8> %x.val to <8 x i16>
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%a = shufflevector <8 x i16> %x.ext, <8 x i16> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
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br label %l1
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l1:
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%p = phi i32 [ 0, %entry ], [ %pa, %l1 ]
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%q = phi <8 x i16> [ zeroinitializer, %entry ], [ %c, %l1 ]
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%y.idx = mul nuw nsw i32 %p, 4
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%y.ptr = getelementptr i8, ptr %y, i32 %y.idx
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%y.val = load <8 x i8>, ptr %y.ptr
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%y.ext = sext <8 x i8> %y.val to <8 x i16>
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%b = mul <8 x i16> %y.ext, %a
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%c = add <8 x i16> %q, %b
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%pa = add i32 %p, 1
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%c1 = icmp eq i32 %p, 0
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br i1 %c1, label %l1, label %l2
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l2:
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ret <8 x i16> %c
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}
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define <4 x i32> @mul_splat_sext_v4i32(ptr %x, ptr %y) {
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; CHECK-LABEL: mul_splat_sext_v4i32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: ldr d1, [x0]
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; CHECK-NEXT: mov x8, xzr
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; CHECK-NEXT: .LBB1_1: // %l1
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr d2, [x1, x8]
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; CHECK-NEXT: add x8, x8, #8
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; CHECK-NEXT: cmp w8, #8
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; CHECK-NEXT: smlal v0.4s, v2.4h, v1.h[3]
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; CHECK-NEXT: b.eq .LBB1_1
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; CHECK-NEXT: // %bb.2: // %l2
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; CHECK-NEXT: ret
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entry:
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%x.val = load <4 x i16>, ptr %x
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%x.ext = sext <4 x i16> %x.val to <4 x i32>
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%a = shufflevector <4 x i32> %x.ext, <4 x i32> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
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br label %l1
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l1:
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%p = phi i32 [ 0, %entry ], [ %pa, %l1 ]
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%q = phi <4 x i32> [ zeroinitializer, %entry ], [ %c, %l1 ]
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%y.idx = mul nuw nsw i32 %p, 4
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%y.ptr = getelementptr i16, ptr %y, i32 %y.idx
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%y.val = load <4 x i16>, ptr %y.ptr
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%y.ext = sext <4 x i16> %y.val to <4 x i32>
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%b = mul <4 x i32> %y.ext, %a
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%c = add <4 x i32> %q, %b
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%pa = add i32 %p, 1
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%c1 = icmp eq i32 %p, 0
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br i1 %c1, label %l1, label %l2
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l2:
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ret <4 x i32> %c
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}
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define <2 x i64> @mul_splat_sext_v2i64(ptr %x, ptr %y) {
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; CHECK-LABEL: mul_splat_sext_v2i64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: ldr d1, [x0]
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; CHECK-NEXT: mov x8, xzr
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; CHECK-NEXT: .LBB2_1: // %l1
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr d2, [x1, x8]
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; CHECK-NEXT: add x8, x8, #16
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; CHECK-NEXT: cmp w8, #16
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; CHECK-NEXT: smlal v0.2d, v2.2s, v1.s[1]
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; CHECK-NEXT: b.eq .LBB2_1
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; CHECK-NEXT: // %bb.2: // %l2
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; CHECK-NEXT: ret
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entry:
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%x.val = load <2 x i32>, ptr %x
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%x.ext = sext <2 x i32> %x.val to <2 x i64>
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%a = shufflevector <2 x i64> %x.ext, <2 x i64> undef, <2 x i32> <i32 1, i32 1>
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br label %l1
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l1:
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%p = phi i32 [ 0, %entry ], [ %pa, %l1 ]
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%q = phi <2 x i64> [ zeroinitializer, %entry ], [ %c, %l1 ]
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%y.idx = mul nuw nsw i32 %p, 4
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%y.ptr = getelementptr i32, ptr %y, i32 %y.idx
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%y.val = load <2 x i32>, ptr %y.ptr
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%y.ext = sext <2 x i32> %y.val to <2 x i64>
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%b = mul <2 x i64> %y.ext, %a
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%c = add <2 x i64> %q, %b
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%pa = add i32 %p, 1
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%c1 = icmp eq i32 %p, 0
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br i1 %c1, label %l1, label %l2
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l2:
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ret <2 x i64> %c
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}
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define <8 x i16> @mul_sext_splat_v8i16(ptr %x, ptr %y) {
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; CHECK-LABEL: mul_sext_splat_v8i16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: mov x8, xzr
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; CHECK-NEXT: dup v1.8b, v0.b[3]
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: sshll v1.8h, v1.8b, #0
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; CHECK-NEXT: .LBB3_1: // %l1
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr d2, [x1, x8]
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; CHECK-NEXT: add x8, x8, #4
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; CHECK-NEXT: cmp w8, #4
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; CHECK-NEXT: sshll v2.8h, v2.8b, #0
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; CHECK-NEXT: mla v0.8h, v2.8h, v1.8h
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; CHECK-NEXT: b.eq .LBB3_1
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; CHECK-NEXT: // %bb.2: // %l2
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; CHECK-NEXT: ret
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entry:
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%x.val = load <8 x i8>, ptr %x
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%x.spt = shufflevector <8 x i8> %x.val, <8 x i8> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
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%a = sext <8 x i8> %x.spt to <8 x i16>
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br label %l1
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l1:
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%p = phi i32 [ 0, %entry ], [ %pa, %l1 ]
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%q = phi <8 x i16> [ zeroinitializer, %entry ], [ %c, %l1 ]
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%y.idx = mul nuw nsw i32 %p, 4
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%y.ptr = getelementptr i8, ptr %y, i32 %y.idx
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%y.val = load <8 x i8>, ptr %y.ptr
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%y.ext = sext <8 x i8> %y.val to <8 x i16>
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%b = mul <8 x i16> %y.ext, %a
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%c = add <8 x i16> %q, %b
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%pa = add i32 %p, 1
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%c1 = icmp eq i32 %p, 0
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br i1 %c1, label %l1, label %l2
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l2:
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ret <8 x i16> %c
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}
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define <4 x i32> @mul_sext_splat_v4i32(ptr %x, ptr %y) {
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; CHECK-LABEL: mul_sext_splat_v4i32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: mov x8, xzr
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; CHECK-NEXT: dup v1.4h, v0.h[3]
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: sshll v1.4s, v1.4h, #0
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; CHECK-NEXT: .LBB4_1: // %l1
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr d2, [x1, x8]
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; CHECK-NEXT: add x8, x8, #8
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; CHECK-NEXT: cmp w8, #8
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; CHECK-NEXT: sshll v2.4s, v2.4h, #0
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; CHECK-NEXT: mla v0.4s, v2.4s, v1.4s
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; CHECK-NEXT: b.eq .LBB4_1
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; CHECK-NEXT: // %bb.2: // %l2
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; CHECK-NEXT: ret
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entry:
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%x.val = load <4 x i16>, ptr %x
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%x.spt = shufflevector <4 x i16> %x.val, <4 x i16> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
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%a = sext <4 x i16> %x.spt to <4 x i32>
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br label %l1
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l1:
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%p = phi i32 [ 0, %entry ], [ %pa, %l1 ]
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%q = phi <4 x i32> [ zeroinitializer, %entry ], [ %c, %l1 ]
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%y.idx = mul nuw nsw i32 %p, 4
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%y.ptr = getelementptr i16, ptr %y, i32 %y.idx
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%y.val = load <4 x i16>, ptr %y.ptr
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%y.ext = sext <4 x i16> %y.val to <4 x i32>
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%b = mul <4 x i32> %y.ext, %a
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%c = add <4 x i32> %q, %b
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%pa = add i32 %p, 1
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%c1 = icmp eq i32 %p, 0
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br i1 %c1, label %l1, label %l2
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l2:
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ret <4 x i32> %c
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}
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define <2 x i64> @mul_sext_splat_v2i64(ptr %x, ptr %y) {
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; CHECK-LABEL: mul_sext_splat_v2i64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: mov x8, xzr
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; CHECK-NEXT: dup v0.2s, v0.s[1]
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; CHECK-NEXT: sshll v1.2d, v0.2s, #0
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: mov x9, v1.d[1]
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; CHECK-NEXT: fmov x10, d1
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; CHECK-NEXT: .LBB5_1: // %l1
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr d1, [x1, x8]
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; CHECK-NEXT: add x8, x8, #16
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; CHECK-NEXT: cmp w8, #16
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; CHECK-NEXT: sshll v1.2d, v1.2s, #0
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; CHECK-NEXT: fmov x12, d1
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; CHECK-NEXT: mov x11, v1.d[1]
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; CHECK-NEXT: smull x12, w12, w10
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; CHECK-NEXT: smull x11, w11, w9
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; CHECK-NEXT: fmov d1, x12
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; CHECK-NEXT: mov v1.d[1], x11
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; CHECK-NEXT: add v0.2d, v0.2d, v1.2d
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; CHECK-NEXT: b.eq .LBB5_1
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; CHECK-NEXT: // %bb.2: // %l2
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; CHECK-NEXT: ret
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entry:
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%x.val = load <2 x i32>, ptr %x
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%x.spt = shufflevector <2 x i32> %x.val, <2 x i32> undef, <2 x i32> <i32 1, i32 1>
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%a = sext <2 x i32> %x.spt to <2 x i64>
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br label %l1
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l1:
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%p = phi i32 [ 0, %entry ], [ %pa, %l1 ]
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%q = phi <2 x i64> [ zeroinitializer, %entry ], [ %c, %l1 ]
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%y.idx = mul nuw nsw i32 %p, 4
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%y.ptr = getelementptr i32, ptr %y, i32 %y.idx
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%y.val = load <2 x i32>, ptr %y.ptr
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%y.ext = sext <2 x i32> %y.val to <2 x i64>
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%b = mul <2 x i64> %y.ext, %a
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%c = add <2 x i64> %q, %b
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%pa = add i32 %p, 1
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%c1 = icmp eq i32 %p, 0
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br i1 %c1, label %l1, label %l2
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l2:
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ret <2 x i64> %c
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}

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