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Enable early elimination of fall-through B in ARM analyzeBranch
This patch enables the ARM backend’s analyzeBranch() to fold away an unconditional branch targeting its layout-successor, mirroring the existing AArch64 behavior. When AllowModify is true and a lone B instruction jumps to the very next block in layout, the branch is removed and the block simply falls through.
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llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp

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@@ -215,7 +215,24 @@ bool ARMBaseInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
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// to clean up any instructions at the tail of the basic block.
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CantAnalyze = true;
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} else if (isUncondBranchOpcode(I->getOpcode())) {
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// Record the fall-through target.
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TBB = I->getOperand(0).getMBB();
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if (AllowModify && !isPredicated(*I) && TBB &&
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MBB.isLayoutSuccessor(TBB)) {
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// Remove the fall-through unconditional branch and continue the
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// backward scan from the previous instruction. The normal scanning
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// logic will classify whatever remains (including fall-through
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// conditional branches) consistently with the rest of this function.
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auto After = I;
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if (After == MBB.instr_begin()) {
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I->eraseFromParent();
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return false; // Empty of terminators: falls through.
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}
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auto Prev = std::prev(After);
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I->eraseFromParent();
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I = Prev;
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continue;
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}
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} else if (isCondBranchOpcode(I->getOpcode())) {
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// Bail out if we encounter multiple conditional branches.
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if (!Cond.empty())

llvm/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir

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@@ -33,7 +33,6 @@ body: |
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; CHECK-NEXT: t2CMPri $sp, 34, 14 /* CC::al */, $noreg, implicit-def $cpsr
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; CHECK-NEXT: t2Bcc %bb.2, 1 /* CC::ne */, $cpsr
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; CHECK-NEXT: t2Bcc %bb.2, 2 /* CC::hs */, killed $cpsr
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; CHECK-NEXT: t2B %bb.1, 14 /* CC::al */, $noreg
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */

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