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RKSimonRKSimon
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[X86] addConstantComments - add vector constant printing for (V)PMULDQ/(V)PMULUDQ instructions (#163958)
1 parent 0fdfad3 commit f404517

34 files changed

+449
-447
lines changed

‎llvm/lib/Target/X86/X86MCInstLower.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1970,6 +1970,8 @@ static void addConstantComments(const MachineInstr *MI,
19701970
}
19711971

19721972
CASE_ARITH_RM(PMADDWD)
1973+
CASE_ARITH_RM(PMULDQ)
1974+
CASE_ARITH_RM(PMULUDQ)
19731975
CASE_ARITH_RM(PMULLD)
19741976
CASE_AVX512_ARITH_RM(PMULLQ)
19751977
CASE_ARITH_RM(PMULLW)

‎llvm/test/CodeGen/X86/combine-multiplies.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -142,9 +142,9 @@ define void @testCombineMultiplies_non_splat(<4 x i32> %v1) nounwind {
142142
; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [11,22,33,44]
143143
; CHECK-NEXT: paddd %xmm0, %xmm1
144144
; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
145-
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
145+
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [22,33,44,55]
146146
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
147-
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2
147+
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2 # [33,u,55,u]
148148
; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
149149
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
150150
; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [242,726,1452,2420]

‎llvm/test/CodeGen/X86/combine-pmuldq.ll‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -204,16 +204,16 @@ define i32 @PR43159(ptr %a0) {
204204
; SSE: # %bb.0: # %entry
205205
; SSE-NEXT: movdqa (%rdi), %xmm0
206206
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
207-
; SSE-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
207+
; SSE-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [344322273,344322273,1916962805,1916962805]
208208
; SSE-NEXT: movdqa %xmm0, %xmm2
209209
; SSE-NEXT: psrld $1, %xmm2
210210
; SSE-NEXT: pblendw {{.*#+}} xmm2 = xmm0[0,1,2,3],xmm2[4,5],xmm0[6,7]
211211
; SSE-NEXT: psubd %xmm1, %xmm0
212212
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
213-
; SSE-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
213+
; SSE-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2147483648,2147483648,2147483648,2147483648]
214214
; SSE-NEXT: paddd %xmm1, %xmm0
215215
; SSE-NEXT: psrld $7, %xmm0
216-
; SSE-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
216+
; SSE-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [1645975491,344322273,2164392969,1916962805]
217217
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
218218
; SSE-NEXT: psrld $6, %xmm1
219219
; SSE-NEXT: movd %xmm1, %edi
@@ -226,15 +226,15 @@ define i32 @PR43159(ptr %a0) {
226226
; AVX1: # %bb.0: # %entry
227227
; AVX1-NEXT: vmovdqa (%rdi), %xmm0
228228
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
229-
; AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
229+
; AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [344322273,344322273,1916962805,1916962805]
230230
; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm2
231231
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
232-
; AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
232+
; AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 # [2147483648,2147483648,2147483648,2147483648]
233233
; AVX1-NEXT: vpaddd %xmm1, %xmm2, %xmm1
234234
; AVX1-NEXT: vpsrld $7, %xmm1, %xmm1
235235
; AVX1-NEXT: vpsrld $1, %xmm0, %xmm2
236236
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5],xmm0[6,7]
237-
; AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
237+
; AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [1645975491,344322273,2164392969,1916962805]
238238
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
239239
; AVX1-NEXT: vpsrld $6, %xmm0, %xmm0
240240
; AVX1-NEXT: vmovd %xmm0, %edi
@@ -247,9 +247,9 @@ define i32 @PR43159(ptr %a0) {
247247
; AVX2: # %bb.0: # %entry
248248
; AVX2-NEXT: vmovdqa (%rdi), %xmm0
249249
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
250-
; AVX2-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
250+
; AVX2-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [344322273,u,1916962805,u]
251251
; AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
252-
; AVX2-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
252+
; AVX2-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 # [1645975491,344322273,2164392969,1916962805]
253253
; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
254254
; AVX2-NEXT: vpblendd {{.*#+}} xmm2 = xmm2[0],xmm1[1],xmm2[2],xmm1[3]
255255
; AVX2-NEXT: vpsubd %xmm1, %xmm0, %xmm0
@@ -270,9 +270,9 @@ define i32 @PR43159(ptr %a0) {
270270
; AVX512VL: # %bb.0: # %entry
271271
; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
272272
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
273-
; AVX512VL-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
273+
; AVX512VL-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [344322273,u,1916962805,u]
274274
; AVX512VL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
275-
; AVX512VL-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
275+
; AVX512VL-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 # [1645975491,344322273,2164392969,1916962805]
276276
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
277277
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm2 = xmm2[0],xmm1[1],xmm2[2],xmm1[3]
278278
; AVX512VL-NEXT: vpsubd %xmm1, %xmm0, %xmm0
@@ -293,9 +293,9 @@ define i32 @PR43159(ptr %a0) {
293293
; AVX512DQVL: # %bb.0: # %entry
294294
; AVX512DQVL-NEXT: vmovdqa (%rdi), %xmm0
295295
; AVX512DQVL-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
296-
; AVX512DQVL-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
296+
; AVX512DQVL-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [344322273,u,1916962805,u]
297297
; AVX512DQVL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
298-
; AVX512DQVL-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
298+
; AVX512DQVL-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 # [1645975491,344322273,2164392969,1916962805]
299299
; AVX512DQVL-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
300300
; AVX512DQVL-NEXT: vpblendd {{.*#+}} xmm2 = xmm2[0],xmm1[1],xmm2[2],xmm1[3]
301301
; AVX512DQVL-NEXT: vpsubd %xmm1, %xmm0, %xmm0

‎llvm/test/CodeGen/X86/combine-rotates.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,9 +10,9 @@ define <4 x i32> @combine_vec_rot_rot(<4 x i32> %x) {
1010
; SSE2-LABEL: combine_vec_rot_rot:
1111
; SSE2: # %bb.0:
1212
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
13-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
13+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [524288,131072,32768,8192]
1414
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]
15-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
15+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [131072,u,8192,u]
1616
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]
1717
; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
1818
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]

‎llvm/test/CodeGen/X86/combine-shl.ll‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ define <4 x i32> @combine_vec_shl_known_zero1(<4 x i32> %x) {
8888
; SSE2-NEXT: pmuludq %xmm0, %xmm1
8989
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
9090
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
91-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
91+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [32768,u,8192,u]
9292
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
9393
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
9494
; SSE2-NEXT: movdqa %xmm1, %xmm0
@@ -198,9 +198,9 @@ define <4 x i32> @combine_vec_shl_shl1(<4 x i32> %x) {
198198
; SSE2-LABEL: combine_vec_shl_shl1:
199199
; SSE2: # %bb.0:
200200
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
201-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
201+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [16,64,256,1024]
202202
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
203-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
203+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [64,u,1024,u]
204204
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
205205
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
206206
; SSE2-NEXT: retq
@@ -304,17 +304,17 @@ define <8 x i32> @combine_vec_shl_ext_shl2(<8 x i16> %x) {
304304
; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
305305
; SSE2-NEXT: psrad $16, %xmm1
306306
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
307-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
307+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [131072,524288,2097152,8388608]
308308
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]
309-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
309+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [524288,u,8388608,u]
310310
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
311311
; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
312312
; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
313313
; SSE2-NEXT: psrad $16, %xmm0
314314
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
315-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
315+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [33554432,134217728,536870912,2147483648]
316316
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
317-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
317+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [134217728,u,2147483648,u]
318318
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
319319
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
320320
; SSE2-NEXT: movdqa %xmm2, %xmm0
@@ -673,9 +673,9 @@ define <4 x i32> @combine_vec_shl_add1(<4 x i32> %x) {
673673
; SSE2-LABEL: combine_vec_shl_add1:
674674
; SSE2: # %bb.0:
675675
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
676-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
676+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2,4,8,16]
677677
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
678-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
678+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4,u,16,u]
679679
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
680680
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
681681
; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
@@ -726,9 +726,9 @@ define <4 x i32> @combine_vec_shl_or1(<4 x i32> %x) {
726726
; SSE2-LABEL: combine_vec_shl_or1:
727727
; SSE2: # %bb.0:
728728
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
729-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
729+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [2,4,8,16]
730730
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
731-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
731+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4,u,16,u]
732732
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
733733
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
734734
; SSE2-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
@@ -787,9 +787,9 @@ define <4 x i32> @combine_vec_shl_mul1(<4 x i32> %x) {
787787
; SSE2-LABEL: combine_vec_shl_mul1:
788788
; SSE2: # %bb.0:
789789
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
790-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
790+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [10,24,56,128]
791791
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
792-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
792+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [24,u,128,u]
793793
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
794794
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
795795
; SSE2-NEXT: retq
@@ -813,9 +813,9 @@ define <4 x i32> @combine_vec_add_shl_nonsplat(<4 x i32> %a0) {
813813
; SSE2-LABEL: combine_vec_add_shl_nonsplat:
814814
; SSE2: # %bb.0:
815815
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
816-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
816+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [4,8,16,32]
817817
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
818-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
818+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [8,u,32,u]
819819
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
820820
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
821821
; SSE2-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
@@ -852,7 +852,7 @@ define <4 x i32> @combine_vec_add_shl_and_nonsplat(<4 x i32> %a0) {
852852
; SSE2-NEXT: pmuludq %xmm0, %xmm1
853853
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
854854
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
855-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
855+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [8,u,32,u]
856856
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
857857
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
858858
; SSE2-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1

‎llvm/test/CodeGen/X86/dagcombine-shifts.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -437,9 +437,9 @@ define <4 x i32> @shift_zext_shl2_vec(<4 x i8> %x) nounwind {
437437
; X64-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
438438
; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
439439
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
440-
; X64-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
440+
; X64-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [512,256,128,64]
441441
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
442-
; X64-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
442+
; X64-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [256,u,64,u]
443443
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
444444
; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
445445
; X64-NEXT: retq

‎llvm/test/CodeGen/X86/funnel-shift.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -574,9 +574,9 @@ define <4 x i32> @fshl_v4i32_undef1_cst(<4 x i32> %a0) nounwind {
574574
; X86-SSE2-LABEL: fshl_v4i32_undef1_cst:
575575
; X86-SSE2: # %bb.0:
576576
; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
577-
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
577+
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [512,1024,2048,4096]
578578
; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
579-
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
579+
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [1024,u,4096,u]
580580
; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
581581
; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
582582
; X86-SSE2-NEXT: retl
@@ -746,9 +746,9 @@ define <4 x i32> @fshr_v4i32_undef1_cst(<4 x i32> %a0) nounwind {
746746
; X86-SSE2-LABEL: fshr_v4i32_undef1_cst:
747747
; X86-SSE2: # %bb.0:
748748
; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
749-
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
749+
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # [8388608,4194304,2097152,1048576]
750750
; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
751-
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
751+
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [4194304,u,1048576,u]
752752
; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
753753
; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
754754
; X86-SSE2-NEXT: retl

‎llvm/test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -499,9 +499,9 @@ define <4 x i1> @vec_4xi32_nonsplat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
499499
; X86-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
500500
; X86-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
501501
; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
502-
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
502+
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1 # [0,1,16776960,2147483648]
503503
; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
504-
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2
504+
; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2 # [1,u,2147483648,u]
505505
; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
506506
; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
507507
; X86-SSE2-NEXT: pand %xmm1, %xmm0
@@ -524,9 +524,9 @@ define <4 x i1> @vec_4xi32_nonsplat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
524524
; X64-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
525525
; X64-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
526526
; X64-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
527-
; X64-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
527+
; X64-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [0,1,16776960,2147483648]
528528
; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
529-
; X64-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
529+
; X64-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [1,u,2147483648,u]
530530
; X64-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
531531
; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
532532
; X64-SSE2-NEXT: pand %xmm1, %xmm0

‎llvm/test/CodeGen/X86/known-pow2.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,16 +28,16 @@ define <4 x i32> @pow2_non_splat_vec_fail0(<4 x i32> %x) {
2828
; CHECK-NEXT: pmuludq %xmm0, %xmm1
2929
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
3030
; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
31-
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
31+
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [1073741824,u,67108864,u]
3232
; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,3,2,3]
3333
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
3434
; CHECK-NEXT: movdqa %xmm1, %xmm3
3535
; CHECK-NEXT: psrld $1, %xmm3
3636
; CHECK-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,1],xmm1[2,3]
37-
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
37+
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [9,4,16,64]
3838
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
3939
; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
40-
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
40+
; CHECK-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [4,u,64,u]
4141
; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
4242
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
4343
; CHECK-NEXT: psubd %xmm1, %xmm0

‎llvm/test/CodeGen/X86/madd.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2057,10 +2057,10 @@ define <4 x i32> @pmaddwd_negative2(<8 x i16> %A) {
20572057
; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
20582058
; SSE2-NEXT: psrad $16, %xmm2
20592059
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
2060-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
2060+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [4294934528,0,0,0]
20612061
; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
20622062
; SSE2-NEXT: pmaddwd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [1,0,7,0,42,0,32,0]
2063-
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
2063+
; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [32768,4294934528,0,0]
20642064
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm0[0,2]
20652065
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,3]
20662066
; SSE2-NEXT: paddd %xmm2, %xmm1

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