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Created using spr 1.3.5-bogner
1 parent 047c1a5 commit f468062

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+8
-4
lines changed

3 files changed

+8
-4
lines changed

lld/ELF/Arch/RISCV.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1084,7 +1084,6 @@ void RISCV::finalizeRelax(int passes) const {
10841084
llvm::TimeTraceScope timeScope("Finalize RISC-V relaxation");
10851085
Log(ctx) << "relaxation passes: " << passes;
10861086
SmallVector<InputSection *, 0> storage;
1087-
10881087
for (OutputSection *osec : ctx.outputSections) {
10891088
if (!(osec->flags & SHF_EXECINSTR))
10901089
continue;

lld/ELF/LinkerScript.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1230,9 +1230,9 @@ bool LinkerScript::assignOffsets(OutputSection *sec) {
12301230
if (sec->firstInOverlay)
12311231
state->overlaySize = 0;
12321232

1233-
bool synthesizeAlign =
1234-
(sec->flags & SHF_EXECINSTR) && ctx.arg.relocatable && ctx.arg.relax &&
1235-
is_contained({EM_RISCV, EM_LOONGARCH}, ctx.arg.emachine);
1233+
bool synthesizeAlign = ctx.arg.relocatable && ctx.arg.relax &&
1234+
(sec->flags & SHF_EXECINSTR) &&
1235+
ctx.arg.emachine == EM_RISCV;
12361236
// We visited SectionsCommands from processSectionCommands to
12371237
// layout sections. Now, we visit SectionsCommands again to fix
12381238
// section offsets.
@@ -1263,6 +1263,8 @@ bool LinkerScript::assignOffsets(OutputSection *sec) {
12631263
if (isa<PotentialSpillSection>(isec))
12641264
continue;
12651265
const uint64_t pos = dot;
1266+
// If synthesized ALIGN may be needed, call maybeSynthesizeAlign and
1267+
// disable the default handling if the return value is true.
12661268
if (!(synthesizeAlign && ctx.target->maybeSynthesizeAlign(dot, isec)))
12671269
dot = alignToPowerOf2(dot, isec->addralign);
12681270
isec->outSecOff = dot - sec->addr;

lld/ELF/OutputSections.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -892,6 +892,9 @@ std::array<uint8_t, 4> OutputSection::getFiller(Ctx &ctx) {
892892
if (!(flags & SHF_EXECINSTR))
893893
return {0, 0, 0, 0};
894894
if (ctx.arg.relocatable && ctx.arg.emachine == EM_RISCV) {
895+
// See RISCV::maybeSynthesizeAlign: Synthesized NOP bytes and ALIGN
896+
// relocations might be needed between two input sections. Use a NOP for the
897+
// filler.
895898
if (ctx.arg.eflags & EF_RISCV_RVC)
896899
return {1, 0, 1, 0};
897900
return {0x13, 0, 0, 0};

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