Revert "[X86][ARM][RISCV][XCore][M68K] Invert the low bit to get the inverse predicate (NFC) (#151748)"

topperc · topperc · commit f58bc72759e2 · 2025-08-04T15:24:52.000-07:00
This reverts commit 5187038. Failing M68k build bot.
diff --git a/llvm/lib/Target/ARM/Utils/ARMBaseInfo.h b/llvm/lib/Target/ARM/Utils/ARMBaseInfo.h
@@ -46,11 +46,23 @@ enum CondCodes { // Meaning (integer)          Meaning (floating-point)
 };
 
 inline static CondCodes getOppositeCondition(CondCodes CC) {
-  // To reverse a condition it's necessary to only invert the low bit:
-  // Note that unlike in AArch64, flipping the bottom bit for AL is not a valid
-  // predicate.
-  assert(CC != AL && "AL has no opposite condition");
-  return static_cast<CondCodes>(static_cast<unsigned>(CC) ^ 0x1);
+  switch (CC) {
+  default: llvm_unreachable("Unknown condition code");
+  case EQ: return NE;
+  case NE: return EQ;
+  case HS: return LO;
+  case LO: return HS;
+  case MI: return PL;
+  case PL: return MI;
+  case VS: return VC;
+  case VC: return VS;
+  case HI: return LS;
+  case LS: return HI;
+  case GE: return LT;
+  case LT: return GE;
+  case GT: return LE;
+  case LE: return GT;
+  }
 }
 
 /// getSwappedCondition - assume the flags are set by MI(a,b), return
diff --git a/llvm/lib/Target/M68k/M68kInstrInfo.h b/llvm/lib/Target/M68k/M68kInstrInfo.h
@@ -56,9 +56,42 @@ enum CondCode {
 // mb tag based
 
 static inline M68k::CondCode GetOppositeBranchCondition(M68k::CondCode CC) {
-  // To reverse a condition it's necessary to only invert the low bit:
-  assert(CC != M86k::COND_INVALID && "COND_INVALID has no inverse!");
-  return static_cast<CondCode>(static_cast<unsigned>(CC) ^ 0x1);
+  switch (CC) {
+  default:
+    llvm_unreachable("Illegal condition code!");
+  case M68k::COND_T:
+    return M68k::COND_F;
+  case M68k::COND_F:
+    return M68k::COND_T;
+  case M68k::COND_HI:
+    return M68k::COND_LS;
+  case M68k::COND_LS:
+    return M68k::COND_HI;
+  case M68k::COND_CC:
+    return M68k::COND_CS;
+  case M68k::COND_CS:
+    return M68k::COND_CC;
+  case M68k::COND_NE:
+    return M68k::COND_EQ;
+  case M68k::COND_EQ:
+    return M68k::COND_NE;
+  case M68k::COND_VC:
+    return M68k::COND_VS;
+  case M68k::COND_VS:
+    return M68k::COND_VC;
+  case M68k::COND_PL:
+    return M68k::COND_MI;
+  case M68k::COND_MI:
+    return M68k::COND_PL;
+  case M68k::COND_GE:
+    return M68k::COND_LT;
+  case M68k::COND_LT:
+    return M68k::COND_GE;
+  case M68k::COND_GT:
+    return M68k::COND_LE;
+  case M68k::COND_LE:
+    return M68k::COND_GT;
+  }
 }
 
 static inline unsigned GetCondBranchFromCond(M68k::CondCode CC) {
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -1129,9 +1129,22 @@ unsigned RISCVCC::getBrCond(RISCVCC::CondCode CC, unsigned SelectOpc) {
 }
 
 RISCVCC::CondCode RISCVCC::getOppositeBranchCondition(RISCVCC::CondCode CC) {
-  // To reverse a condition it's necessary to only invert the low bit:
-  assert(CC != RISCVCC::COND_INVALID && "COND_INVALID has no inverse!");
-  return static_cast<RISCVCC::CondCode>(static_cast<unsigned>(CC) ^ 0x1);
+  switch (CC) {
+  default:
+    llvm_unreachable("Unrecognized conditional branch");
+  case RISCVCC::COND_EQ:
+    return RISCVCC::COND_NE;
+  case RISCVCC::COND_NE:
+    return RISCVCC::COND_EQ;
+  case RISCVCC::COND_LT:
+    return RISCVCC::COND_GE;
+  case RISCVCC::COND_GE:
+    return RISCVCC::COND_LT;
+  case RISCVCC::COND_LTU:
+    return RISCVCC::COND_GEU;
+  case RISCVCC::COND_GEU:
+    return RISCVCC::COND_LTU;
+  }
 }
 
 bool RISCVInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -3300,9 +3300,46 @@ unsigned X86::getNonNDVariant(unsigned Opc) {
 /// Return the inverse of the specified condition,
 /// e.g. turning COND_E to COND_NE.
 X86::CondCode X86::GetOppositeBranchCondition(X86::CondCode CC) {
-  // To reverse a condition it's necessary to only invert the low bit:
-  assert(CC != COND_INVALID && "COND_INVALID has no inverse!");
-  return static_cast<CondCode>(static_cast<unsigned>(CC) ^ 0x1);
+  switch (CC) {
+  default:
+    llvm_unreachable("Illegal condition code!");
+  case X86::COND_E:
+    return X86::COND_NE;
+  case X86::COND_NE:
+    return X86::COND_E;
+  case X86::COND_L:
+    return X86::COND_GE;
+  case X86::COND_LE:
+    return X86::COND_G;
+  case X86::COND_G:
+    return X86::COND_LE;
+  case X86::COND_GE:
+    return X86::COND_L;
+  case X86::COND_B:
+    return X86::COND_AE;
+  case X86::COND_BE:
+    return X86::COND_A;
+  case X86::COND_A:
+    return X86::COND_BE;
+  case X86::COND_AE:
+    return X86::COND_B;
+  case X86::COND_S:
+    return X86::COND_NS;
+  case X86::COND_NS:
+    return X86::COND_S;
+  case X86::COND_P:
+    return X86::COND_NP;
+  case X86::COND_NP:
+    return X86::COND_P;
+  case X86::COND_O:
+    return X86::COND_NO;
+  case X86::COND_NO:
+    return X86::COND_O;
+  case X86::COND_NE_OR_P:
+    return X86::COND_E_AND_NP;
+  case X86::COND_E_AND_NP:
+    return X86::COND_NE_OR_P;
+  }
 }
 
 /// Assuming the flags are set by MI(a,b), return the condition code if we
diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.cpp b/llvm/lib/Target/XCore/XCoreInstrInfo.cpp
@@ -150,10 +150,13 @@ static inline unsigned GetCondBranchFromCond(XCore::CondCode CC)
 
 /// GetOppositeBranchCondition - Return the inverse of the specified
 /// condition, e.g. turning COND_E to COND_NE.
-static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) {
-  // To reverse a condition it's necessary to only invert the low bit:
-  assert(CC != XCore::COND_INVALID && "COND_INVALID has no inverse!");
-  return static_cast<XCore::CondCode>(static_cast<unsigned>(CC) ^ 0x1);
+static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
+{
+  switch (CC) {
+  default: llvm_unreachable("Illegal condition code!");
+  case XCore::COND_TRUE   : return XCore::COND_FALSE;
+  case XCore::COND_FALSE  : return XCore::COND_TRUE;
+  }
 }
 
 /// analyzeBranch - Analyze the branching code at the end of MBB, returning
