add XIangShan RTL as submodule

khaser · khaser · commit f5b34c4a170a · 2025-10-18T17:26:41.000+03:00
diff --git a/.gitmodules b/.gitmodules
@@ -0,0 +1,3 @@
+[submodule "cpu-rtl"]
+	path = cpu-rtl
+	url = git@github.com:OpenXiangShan/XiangShan.git
diff --git a/cpu-rtl b/cpu-rtl
@@ -0,0 +1 @@
+Subproject commit 1f3fb10e4e6d7132dd6a4f2e64338b61ac2d39e3

Original file line number	Diff line number	Diff line change
`@@ -0,0 +1,3 @@`
	`1`	`+[submodule "cpu-rtl"]`
	`2`	`+ path = cpu-rtl`
	`3`	`+ url = [email protected]:OpenXiangShan/XiangShan.git`