fixup! [RISCV] Support cR Inline Asm Constraint

Author: lenary

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

@@ -20993,7 +20993,7 @@ RISCVTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
     if (!VT.isVector())
       return std::make_pair(0U, &RISCV::GPRCRegClass);
   } else if (Constraint == "cR") {
-      return std::make_pair(0U, &RISCV::GPRPairCRegClass);
+    return std::make_pair(0U, &RISCV::GPRPairCRegClass);
   } else if (Constraint == "cf") {
     if (VT == MVT::f16) {
       if (Subtarget.hasStdExtZfhmin())