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Update multiclass name to include VX
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llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -914,7 +914,7 @@ defm : VPatWidenBinarySDNode_VV_VX_WV_WX<add, anyext_oneuse, "PseudoVWADDU">;
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// DAGCombiner::hoistLogicOpWithSameOpcodeHands may hoist disjoint ors
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// to (ext (or disjoint (a, b)))
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multiclass VPatWidenOrDisjoint_VV<SDNode extop, string instruction_name> {
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multiclass VPatWidenOrDisjoint_VV_VX<SDNode extop, string instruction_name> {
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foreach vtiToWti = AllWidenableIntVectors in {
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defvar vti = vtiToWti.Vti;
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defvar wti = vtiToWti.Wti;

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