Address review feedback, limit masked loads to avoid sub byte element types

Author: dakersnar

llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

@@ -3527,8 +3527,8 @@ convertMLOADToLoadWithUsedBytesMask(MemSDNode *N, SelectionDAG &DAG) {
 
   for (SDValue Op : reverse(Mask->ops())) {
     // We technically only want to do this shift for every
-    // iteration *but* the first, but in the first iteration NewMask is 0, so
-    // this shift is a no-op.
+    // iteration *but* the first, but in the first iteration UsedBytesMask is 0,
+    // so this shift is a no-op.
     UsedBytesMask <<= ElementSizeInBytes;
 
     // Mask elements must be constants.

llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp

@@ -623,7 +623,12 @@ bool NVPTXTTIImpl::isLegalMaskedLoad(Type *DataTy, Align Alignment,
 
   if (Alignment < DL.getTypeStoreSize(DataTy))
     return false;
-  return true;
+
+  // We do not support sub-byte element type masked loads.
+  auto *VTy = dyn_cast<FixedVectorType>(DataTy);
+  if (!VTy)
+    return false;
+  return VTy->getElementType()->getScalarSizeInBits() >= 8;
 }
 
 unsigned NVPTXTTIImpl::getLoadStoreVecRegBitWidth(unsigned AddrSpace) const {