@@ -3278,22 +3278,22 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
32783278 return EmitZTInstr(MI, BB, AArch64::MOVT_TIZ, /*Op0IsDef=*/true);
32793279
32803280 case AArch64::AUTx16x17:
3281- fixupBlendComponents (MI, BB, MI.getOperand(1), MI.getOperand(2),
3282- &AArch64::GPR64noipRegClass);
3281+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(1), MI.getOperand(2),
3282+ &AArch64::GPR64noipRegClass);
32833283 return BB;
32843284 case AArch64::AUTxMxN:
3285- fixupBlendComponents (MI, BB, MI.getOperand(4), MI.getOperand(5),
3286- &AArch64::GPR64noipRegClass);
3285+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(4), MI.getOperand(5),
3286+ &AArch64::GPR64noipRegClass);
32873287 return BB;
32883288 case AArch64::PAC:
32893289 fixupPtrauthDiscriminator(MI, BB, MI.getOperand(3), MI.getOperand(4),
32903290 &AArch64::GPR64noipRegClass);
32913291 return BB;
32923292 case AArch64::AUTPAC:
3293- fixupBlendComponents (MI, BB, MI.getOperand(1), MI.getOperand(2),
3294- &AArch64::GPR64noipRegClass);
3295- fixupBlendComponents (MI, BB, MI.getOperand(4), MI.getOperand(5),
3296- &AArch64::GPR64noipRegClass);
3293+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(1), MI.getOperand(2),
3294+ &AArch64::GPR64noipRegClass);
3295+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(4), MI.getOperand(5),
3296+ &AArch64::GPR64noipRegClass);
32973297 return BB;
32983298 }
32993299}
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