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llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1182,7 +1182,7 @@ bool AMDGPURegisterBankInfo::applyMappingDynStackAlloc(
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// Guard in case the stack growth direction ever changes with scratch
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// instructions.
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assert(TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp &&
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"Stack grows upwards for AMDGPU\n");
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"Stack grows upwards for AMDGPU");
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Register Dst = MI.getOperand(0).getReg();
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Register AllocSize = MI.getOperand(1).getReg();

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4042,7 +4042,7 @@ SDValue SITargetLowering::lowerDYNAMIC_STACKALLOCImpl(SDValue Op,
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MaybeAlign Alignment = cast<ConstantSDNode>(Tmp3)->getMaybeAlignValue();
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const TargetFrameLowering *TFL = Subtarget->getFrameLowering();
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assert(TFL->getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp &&
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"Stack grows upwards for AMDGPU\n");
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"Stack grows upwards for AMDGPU");
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SDValue ScaledSize = DAG.getNode(
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ISD::SHL, dl, VT, Size,

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