Address review comment

Author: phoebewang

llvm/include/llvm/CodeGen/TileShapeInfo.h

@@ -36,7 +36,7 @@ class ShapeT {
   }
   // When ShapeT has mult shapes, we only use Shapes (never use Row and Col)
   // and ImmShapes. Due to the most case is only one shape (just simply use
-  // Shape.Row or Shape.Col), so here we don't merge Row and Col into vertor
+  // Shape.Row or Shape.Col), so here we don't merge Row and Col into vector
   // Shapes to keep the speed and code simplicity.
   // TODO: The upper solution is a temporary way to minimize current tile
   // register allocation code changes. It can not handle both Reg shape and

llvm/lib/Target/X86/X86ExpandPseudo.cpp

@@ -615,7 +615,7 @@ bool X86ExpandPseudo::expandMI(MachineBasicBlock &MBB,
     MBB.erase(MBBI);
     return true;
   }
-  // Smilar with TILEPAIRLOAD, TILEPAIRSTORE is just for TILEPair spill, no
+  // Similar with TILEPAIRLOAD, TILEPAIRSTORE is just for TILEPair spill, no
   // corresponding AMX instruction to support it. So, split it too:
   // "TILEPAIRSTORE Base, Scale, Index, Offset, Segment, TMM0:TMM1" -->
   // "TILESTORE Base, Scale, Index, Offset, Segment, TMM0" +

llvm/lib/Target/X86/X86FastPreTileConfig.cpp

@@ -268,7 +268,7 @@ void X86FastPreTileConfig::reload(MachineBasicBlock::iterator UseMI,
                     << printReg(TileReg, TRI) << '\n');
 }
 
-unsigned getTileDefNum(MachineRegisterInfo *MRI, Register Reg) {
+static unsigned getTileDefNum(MachineRegisterInfo *MRI, Register Reg) {
   if (Reg.isVirtual()) {
     unsigned RegClassID = MRI->getRegClass(Reg)->getID();
     if (RegClassID == X86::TILERegClassID)

llvm/lib/TargetParser/Host.cpp

@@ -1875,8 +1875,8 @@ const StringMap<bool> sys::getHostCPUFeatures() {
       MaxLevel >= 0x19 && !getX86CpuIDAndInfo(0x19, &EAX, &EBX, &ECX, &EDX);
   Features["widekl"] = HasLeaf7 && HasLeaf19 && ((EBX >> 2) & 1);
 
-  bool HasLeaf1E =
-      MaxLevel >= 0x1e && !getX86CpuIDAndInfo(0x1e, &EAX, &EBX, &ECX, &EDX);
+  bool HasLeaf1E = MaxLevel >= 0x1e &&
+                   !getX86CpuIDAndInfoEx(0x1e, 0x1, &EAX, &EBX, &ECX, &EDX);
   Features["amx-transpose"] = HasLeaf1E && ((EAX >> 5) & 1) && HasAMXSave;
 
   bool HasLeaf24 =