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Add comment noting that AND instruction will be deleted
Signed-off-by: John Lu <[email protected]>
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llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

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@@ -4056,6 +4056,7 @@ SDValue AMDGPUTargetLowering::performShlCombine(SDNode *N,
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if (Known.getMinValue().getZExtValue() >= TargetType.getSizeInBits()) {
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SDValue truncShiftAmt = DAG.getNode(ISD::TRUNCATE, SL, TargetType, RHS);
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const SDValue ShiftMask = DAG.getConstant(TargetType.getSizeInBits() - 1, SL, TargetType);
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// This AND instruction will be removed during later instruction selection.
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SDValue MaskedShiftAmt =
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DAG.getNode(ISD::AND, SL, TargetType, truncShiftAmt, ShiftMask);
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SDValue Lo = DAG.getNode(ISD::TRUNCATE, SL, TargetType, LHS);

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