@@ -5992,26 +5992,6 @@ multiclass SIMDThreeSameVectorFP<bit U, bit S, bits<3> opc,
59925992 [(set (v2f64 V128:$Rd), (OpNode (v2f64 V128:$Rn), (v2f64 V128:$Rm)))]>;
59935993}
59945994
5995- let mayRaiseFPException = 1, Uses = [FPCR] in
5996- multiclass SIMDThreeVectorFP<bit U, bit S, bits<3> opc,
5997- string asm, SDPatternOperator OpNode> {
5998- def v4f16 : BaseSIMDThreeSameVector<0, U, {S,0b10}, {0b00,opc}, V64,
5999- asm, ".4h",
6000- [(set (v4f16 V64:$Rd), (OpNode (v4f16 V64:$Rn), (v4i16 V64:$Rm)))]>;
6001- def v8f16 : BaseSIMDThreeSameVector<1, U, {S,0b10}, {0b00,opc}, V128,
6002- asm, ".8h",
6003- [(set (v8f16 V128:$Rd), (OpNode (v8f16 V128:$Rn), (v8i16 V128:$Rm)))]>;
6004- def v2f32 : BaseSIMDThreeSameVector<0, U, {S,0b01}, {0b11,opc}, V64,
6005- asm, ".2s",
6006- [(set (v2f32 V64:$Rd), (OpNode (v2f32 V64:$Rn), (v2i32 V64:$Rm)))]>;
6007- def v4f32 : BaseSIMDThreeSameVector<1, U, {S,0b01}, {0b11,opc}, V128,
6008- asm, ".4s",
6009- [(set (v4f32 V128:$Rd), (OpNode (v4f32 V128:$Rn), (v4i32 V128:$Rm)))]>;
6010- def v2f64 : BaseSIMDThreeSameVector<1, U, {S,0b11}, {0b11,opc}, V128,
6011- asm, ".2d",
6012- [(set (v2f64 V128:$Rd), (OpNode (v2f64 V128:$Rn), (v2i64 V128:$Rm)))]>;
6013- }
6014-
60155995let mayRaiseFPException = 1, Uses = [FPCR] in
60165996multiclass SIMDThreeSameVectorFPCmp<bit U, bit S, bits<3> opc,
60175997 string asm,
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