[mlir][LLVMIR] Adding ivdepEnable parameter in LoopVectorizeAttr

`loop.vectorize.ivdep.enable` metadata has been added to LLVM to
ignoring vector dependencies. Adding this parameter to LoopVectorizeAttr
will allow Flang to use this metadata with the `!DIR$ IVDEP` directive.

Author: JDPailleux

mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td

@@ -106,15 +106,14 @@ def LoopVectorizeAttr : LLVM_Attr<"LoopVectorize", "loop_vectorize"> {
     the "!llvm.loop.vectorize" metadata.
   }];
 
-  let parameters = (ins
-    OptionalParameter<"BoolAttr">:$disable,
-    OptionalParameter<"BoolAttr">:$predicateEnable,
-    OptionalParameter<"BoolAttr">:$scalableEnable,
-    OptionalParameter<"IntegerAttr">:$width,
-    OptionalParameter<"LoopAnnotationAttr">:$followupVectorized,
-    OptionalParameter<"LoopAnnotationAttr">:$followupEpilogue,
-    OptionalParameter<"LoopAnnotationAttr">:$followupAll
-  );
+  let parameters = (ins OptionalParameter<"BoolAttr">:$disable,
+      OptionalParameter<"BoolAttr">:$predicateEnable,
+      OptionalParameter<"BoolAttr">:$scalableEnable,
+      OptionalParameter<"BoolAttr">:$ivdepEnable,
+      OptionalParameter<"IntegerAttr">:$width,
+      OptionalParameter<"LoopAnnotationAttr">:$followupVectorized,
+      OptionalParameter<"LoopAnnotationAttr">:$followupEpilogue,
+      OptionalParameter<"LoopAnnotationAttr">:$followupAll);
 
   let assemblyFormat = "`<` struct(params) `>`";
 

mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp

@@ -291,6 +291,8 @@ FailureOr<LoopVectorizeAttr> LoopMetadataConversion::convertVectorizeAttr() {
       lookupBoolNode("llvm.loop.vectorize.predicate.enable");
   FailureOr<BoolAttr> scalableEnable =
       lookupBoolNode("llvm.loop.vectorize.scalable.enable");
+  FailureOr<BoolAttr> ivdepEnable =
+      lookupBoolNode("llvm.loop.vectorize.ivdep.enable");
   FailureOr<IntegerAttr> width = lookupIntNode("llvm.loop.vectorize.width");
   FailureOr<LoopAnnotationAttr> followupVec =
       lookupFollowupNode("llvm.loop.vectorize.followup_vectorized");
@@ -299,9 +301,9 @@ FailureOr<LoopVectorizeAttr> LoopMetadataConversion::convertVectorizeAttr() {
   FailureOr<LoopAnnotationAttr> followupAll =
       lookupFollowupNode("llvm.loop.vectorize.followup_all");
 
-  return createIfNonNull<LoopVectorizeAttr>(ctx, enable, predicateEnable,
-                                            scalableEnable, width, followupVec,
-                                            followupEpi, followupAll);
+  return createIfNonNull<LoopVectorizeAttr>(
+      ctx, enable, predicateEnable, scalableEnable, ivdepEnable, width,
+      followupVec, followupEpi, followupAll);
 }
 
 FailureOr<LoopInterleaveAttr> LoopMetadataConversion::convertInterleaveAttr() {

mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp

@@ -108,6 +108,7 @@ void LoopAnnotationConversion::convertLoopOptions(LoopVectorizeAttr options) {
                   options.getPredicateEnable());
   convertBoolNode("llvm.loop.vectorize.scalable.enable",
                   options.getScalableEnable());
+  convertBoolNode("llvm.loop.vectorize.ivdep.enable", options.getIvdepEnable());
   convertI32Node("llvm.loop.vectorize.width", options.getWidth());
   convertFollowupNode("llvm.loop.vectorize.followup_vectorized",
                       options.getFollowupVectorized());

mlir/test/Target/LLVMIR/Import/metadata-loop.ll

@@ -73,7 +73,7 @@ end:
 ; // -----
 
 ; CHECK-DAG: #[[FOLLOWUP:.*]] = #llvm.loop_annotation<disableNonforced = true>
-; CHECK-DAG: #[[VECTORIZE_ATTR:.*]] = #llvm.loop_vectorize<disable = false, predicateEnable = true, scalableEnable = false, width = 16 : i32, followupVectorized = #[[FOLLOWUP]], followupEpilogue = #[[FOLLOWUP]], followupAll = #[[FOLLOWUP]]>
+; CHECK-DAG: #[[VECTORIZE_ATTR:.*]] = #llvm.loop_vectorize<disable = false, predicateEnable = true, scalableEnable = false, ivdepEnable = false, width = 16 : i32, followupVectorized = #[[FOLLOWUP]], followupEpilogue = #[[FOLLOWUP]], followupAll = #[[FOLLOWUP]]>
 ; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<vectorize = #[[VECTORIZE_ATTR]]>
 
 ; CHECK-LABEL: @vectorize
@@ -85,17 +85,18 @@ end:
   ret void
 }
 
-!1 = distinct !{!1, !2, !3, !4, !5, !6, !7, !8}
+!1 = distinct !{!1, !2, !3, !4, !5, !6, !7, !8, !9}
 !2 = !{!"llvm.loop.vectorize.enable", i1 1}
 !3 = !{!"llvm.loop.vectorize.predicate.enable", i1 1}
 !4 = !{!"llvm.loop.vectorize.scalable.enable", i1 0}
-!5 = !{!"llvm.loop.vectorize.width", i32 16}
-!6 = !{!"llvm.loop.vectorize.followup_vectorized", !9}
-!7 = !{!"llvm.loop.vectorize.followup_epilogue", !9}
-!8 = !{!"llvm.loop.vectorize.followup_all", !9}
-
-!9 = distinct !{!9, !10}
-!10 = !{!"llvm.loop.disable_nonforced"}
+!5 = !{!"llvm.loop.vectorize.ivdep.enable", i1 0}
+!6 = !{!"llvm.loop.vectorize.width", i32 16}
+!7 = !{!"llvm.loop.vectorize.followup_vectorized", !10}
+!8 = !{!"llvm.loop.vectorize.followup_epilogue", !10}
+!9 = !{!"llvm.loop.vectorize.followup_all", !10}
+
+!10 = distinct !{!10, !11}
+!11 = !{!"llvm.loop.disable_nonforced"}
 
 ; // -----
 

mlir/test/Target/LLVMIR/loop-metadata.mlir

@@ -45,7 +45,7 @@ llvm.func @isvectorized() {
 llvm.func @vectorizeOptions() {
   // CHECK: br {{.*}} !llvm.loop ![[LOOP_NODE:[0-9]+]]
   llvm.br ^bb1 {loop_annotation = #llvm.loop_annotation<vectorize = <
-    disable = false, predicateEnable = true, scalableEnable = false, width = 16 : i32,
+    disable = false, predicateEnable = true, scalableEnable = false, ivdepEnable = false, width = 16 : i32,
     followupVectorized = #followup, followupEpilogue = #followup, followupAll = #followup>
   >}
 ^bb1:
@@ -54,10 +54,11 @@ llvm.func @vectorizeOptions() {
 
 // CHECK-DAG: ![[NON_FORCED:[0-9]+]] = !{!"llvm.loop.disable_nonforced"}
 // CHECK-DAG: ![[FOLLOWUP:[0-9]+]] = distinct !{![[FOLLOWUP]], ![[NON_FORCED]]}
-// CHECK-DAG: ![[LOOP_NODE]] = distinct !{![[LOOP_NODE]], !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
+// CHECK-DAG: ![[LOOP_NODE]] = distinct !{![[LOOP_NODE]], !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
 // CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.enable", i1 true}
 // CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
 // CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
+// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.ivdep.enable", i1 false}
 // CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.width", i32 16}
 // CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.followup_vectorized", ![[FOLLOWUP]]}
 // CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.followup_epilogue", ![[FOLLOWUP]]}