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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: llc -mtriple=riscv64 -mattr=+m,+v -verify-machineinstrs < %s | FileCheck %s |
| 3 | + |
| 4 | +define void @reverse(ptr %p) { |
| 5 | +; CHECK-LABEL: reverse: |
| 6 | +; CHECK: # %bb.0: # %entry |
| 7 | +; CHECK-NEXT: li a1, 0 |
| 8 | +; CHECK-NEXT: li a2, 1024 |
| 9 | +; CHECK-NEXT: .LBB0_1: # %loop |
| 10 | +; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 |
| 11 | +; CHECK-NEXT: sub a3, a2, a1 |
| 12 | +; CHECK-NEXT: slli a4, a1, 3 |
| 13 | +; CHECK-NEXT: vsetvli a3, a3, e64, m1, ta, ma |
| 14 | +; CHECK-NEXT: add a4, a0, a4 |
| 15 | +; CHECK-NEXT: vle64.v v8, (a4) |
| 16 | +; CHECK-NEXT: addi a5, a3, -1 |
| 17 | +; CHECK-NEXT: vid.v v9 |
| 18 | +; CHECK-NEXT: vrsub.vx v9, v9, a5 |
| 19 | +; CHECK-NEXT: vrgather.vv v10, v8, v9 |
| 20 | +; CHECK-NEXT: add a1, a1, a3 |
| 21 | +; CHECK-NEXT: vse64.v v10, (a4) |
| 22 | +; CHECK-NEXT: bltu a1, a2, .LBB0_1 |
| 23 | +; CHECK-NEXT: # %bb.2: # %exit |
| 24 | +; CHECK-NEXT: ret |
| 25 | +entry: |
| 26 | + br label %loop |
| 27 | +loop: |
| 28 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 29 | + |
| 30 | + %cnt = sub i64 1024, %iv |
| 31 | + %evl = call i32 @llvm.experimental.get.vector.length(i64 %cnt, i32 1, i1 true) |
| 32 | + |
| 33 | + %p.gep = getelementptr i64, ptr %p, i64 %iv |
| 34 | + %v = call <vscale x 1 x i64> @llvm.vp.load(ptr %p.gep, <vscale x 1 x i1> splat (i1 true), i32 %evl) |
| 35 | + |
| 36 | + %w = call <vscale x 1 x i64> @llvm.experimental.vp.reverse(<vscale x 1 x i64> %v, <vscale x 1 x i1> splat (i1 true), i32 %evl) |
| 37 | + |
| 38 | + call void @llvm.vp.store(<vscale x 1 x i64> %w, ptr %p.gep, <vscale x 1 x i1> splat (i1 true), i32 %evl) |
| 39 | + |
| 40 | + %evl.zext = zext i32 %evl to i64 |
| 41 | + %iv.next = add i64 %iv, %evl.zext |
| 42 | + %done = icmp uge i64 %iv.next, 1024 |
| 43 | + br i1 %done, label %exit, label %loop |
| 44 | + |
| 45 | +exit: |
| 46 | + ret void |
| 47 | +} |
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