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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt -p loop-unroll -S %s | FileCheck %s |
| 3 | + |
| 4 | +target triple = "hexagon-unknown-linux" |
| 5 | + |
| 6 | +declare void @foo() |
| 7 | + |
| 8 | +define void @preserve_lcssa_when_reusing_existing_phi() { |
| 9 | +; CHECK-LABEL: define void @preserve_lcssa_when_reusing_existing_phi() { |
| 10 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 11 | +; CHECK-NEXT: br label %[[LOOP_1_HEADER:.*]] |
| 12 | +; CHECK: [[LOOP_1_HEADER]]: |
| 13 | +; CHECK-NEXT: br label %[[LOOP_2_HEADER:.*]] |
| 14 | +; CHECK: [[LOOP_2_HEADER]]: |
| 15 | +; CHECK-NEXT: br label %[[LOOP_3:.*]] |
| 16 | +; CHECK: [[LOOP_3]]: |
| 17 | +; CHECK-NEXT: [[IV_3:%.*]] = phi i32 [ [[IV_3_NEXT:%.*]], %[[LOOP_3]] ], [ 0, %[[LOOP_2_HEADER]] ] |
| 18 | +; CHECK-NEXT: call void @foo() |
| 19 | +; CHECK-NEXT: [[IV_3_NEXT]] = add i32 [[IV_3]], 1 |
| 20 | +; CHECK-NEXT: br i1 false, label %[[PH:.*]], label %[[LOOP_3]] |
| 21 | +; CHECK: [[PH]]: |
| 22 | +; CHECK-NEXT: [[IV_3_LCSSA:%.*]] = phi i32 [ [[IV_3]], %[[LOOP_3]] ] |
| 23 | +; CHECK-NEXT: br i1 true, label %[[LOOP_2_LATCH:.*]], label %[[LOOP_4_PREHEADER:.*]] |
| 24 | +; CHECK: [[LOOP_4_PREHEADER]]: |
| 25 | +; CHECK-NEXT: [[IV_3_LCSSA_LCSSA1:%.*]] = phi i32 [ [[IV_3_LCSSA]], %[[PH]] ] |
| 26 | +; CHECK-NEXT: [[IV_3_LCSSA_LCSSA:%.*]] = phi i32 [ [[IV_3_LCSSA]], %[[PH]] ] |
| 27 | +; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[IV_3_LCSSA_LCSSA1]], 1 |
| 28 | +; CHECK-NEXT: [[TMP1:%.*]] = freeze i32 [[TMP0]] |
| 29 | +; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], -1 |
| 30 | +; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[TMP1]], 7 |
| 31 | +; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 7 |
| 32 | +; CHECK-NEXT: br i1 [[TMP3]], label %[[LOOP_1_LATCH_UNR_LCSSA:.*]], label %[[LOOP_4_PREHEADER_NEW:.*]] |
| 33 | +; CHECK: [[LOOP_4_PREHEADER_NEW]]: |
| 34 | +; CHECK-NEXT: br label %[[LOOP_4:.*]] |
| 35 | +; CHECK: [[LOOP_2_LATCH]]: |
| 36 | +; CHECK-NEXT: br label %[[LOOP_2_HEADER]] |
| 37 | +; CHECK: [[LOOP_4]]: |
| 38 | +; CHECK-NEXT: [[IV_4:%.*]] = phi i32 [ 0, %[[LOOP_4_PREHEADER_NEW]] ], [ [[INC_I_7:%.*]], %[[LOOP_4]] ] |
| 39 | +; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ 0, %[[LOOP_4_PREHEADER_NEW]] ], [ [[NITER_NEXT_7:%.*]], %[[LOOP_4]] ] |
| 40 | +; CHECK-NEXT: call void @foo() |
| 41 | +; CHECK-NEXT: call void @foo() |
| 42 | +; CHECK-NEXT: call void @foo() |
| 43 | +; CHECK-NEXT: call void @foo() |
| 44 | +; CHECK-NEXT: call void @foo() |
| 45 | +; CHECK-NEXT: call void @foo() |
| 46 | +; CHECK-NEXT: call void @foo() |
| 47 | +; CHECK-NEXT: call void @foo() |
| 48 | +; CHECK-NEXT: [[INC_I_7]] = add nuw nsw i32 [[IV_4]], 8 |
| 49 | +; CHECK-NEXT: [[NITER_NEXT_7]] = add nuw nsw i32 [[NITER]], 8 |
| 50 | +; CHECK-NEXT: br i1 true, label %[[LOOP_1_LATCH_UNR_LCSSA_LOOPEXIT:.*]], label %[[LOOP_4]] |
| 51 | +; CHECK: [[LOOP_1_LATCH_UNR_LCSSA_LOOPEXIT]]: |
| 52 | +; CHECK-NEXT: [[IV_4_UNR_PH:%.*]] = phi i32 [ [[INC_I_7]], %[[LOOP_4]] ] |
| 53 | +; CHECK-NEXT: br label %[[LOOP_1_LATCH_UNR_LCSSA]] |
| 54 | +; CHECK: [[LOOP_1_LATCH_UNR_LCSSA]]: |
| 55 | +; CHECK-NEXT: [[IV_4_UNR:%.*]] = phi i32 [ 0, %[[LOOP_4_PREHEADER]] ], [ [[IV_4_UNR_PH]], %[[LOOP_1_LATCH_UNR_LCSSA_LOOPEXIT]] ] |
| 56 | +; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp ne i32 [[XTRAITER]], 0 |
| 57 | +; CHECK-NEXT: br i1 [[LCMP_MOD]], label %[[LOOP_4_EPIL_PREHEADER:.*]], label %[[LOOP_1_LATCH:.*]] |
| 58 | +; CHECK: [[LOOP_4_EPIL_PREHEADER]]: |
| 59 | +; CHECK-NEXT: br label %[[LOOP_4_EPIL:.*]] |
| 60 | +; CHECK: [[LOOP_4_EPIL]]: |
| 61 | +; CHECK-NEXT: [[IV_4_EPIL:%.*]] = phi i32 [ [[INC_I_EPIL:%.*]], %[[LOOP_4_EPIL]] ], [ [[IV_4_UNR]], %[[LOOP_4_EPIL_PREHEADER]] ] |
| 62 | +; CHECK-NEXT: [[EPIL_ITER:%.*]] = phi i32 [ 0, %[[LOOP_4_EPIL_PREHEADER]] ], [ [[EPIL_ITER_NEXT:%.*]], %[[LOOP_4_EPIL]] ] |
| 63 | +; CHECK-NEXT: call void @foo() |
| 64 | +; CHECK-NEXT: [[INC_I_EPIL]] = add i32 [[IV_4_EPIL]], 1 |
| 65 | +; CHECK-NEXT: [[EC_EPIL:%.*]] = icmp eq i32 [[IV_4_EPIL]], [[IV_3_LCSSA_LCSSA]] |
| 66 | +; CHECK-NEXT: [[EPIL_ITER_NEXT]] = add i32 [[EPIL_ITER]], 1 |
| 67 | +; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i32 [[EPIL_ITER_NEXT]], [[XTRAITER]] |
| 68 | +; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label %[[LOOP_4_EPIL]], label %[[LOOP_1_LATCH_EPILOG_LCSSA:.*]], !llvm.loop [[LOOP0:![0-9]+]] |
| 69 | +; CHECK: [[LOOP_1_LATCH_EPILOG_LCSSA]]: |
| 70 | +; CHECK-NEXT: br label %[[LOOP_1_LATCH]] |
| 71 | +; CHECK: [[LOOP_1_LATCH]]: |
| 72 | +; CHECK-NEXT: br label %[[LOOP_1_HEADER]] |
| 73 | +; |
| 74 | +entry: |
| 75 | + br label %loop.1.header |
| 76 | + |
| 77 | +loop.1.header: |
| 78 | + br label %loop.2.header |
| 79 | + |
| 80 | +loop.2.header: |
| 81 | + br label %loop.3 |
| 82 | + |
| 83 | +loop.3: |
| 84 | + %iv.3 = phi i32 [ %iv.3.next, %loop.3 ], [ 0, %loop.2.header ] |
| 85 | + call void @foo() |
| 86 | + %iv.3.next = add i32 %iv.3, 1 |
| 87 | + br i1 false, label %ph, label %loop.3 |
| 88 | + |
| 89 | +ph: |
| 90 | + br i1 true, label %loop.2.latch, label %loop.4 |
| 91 | + |
| 92 | +loop.2.latch: |
| 93 | + br label %loop.2.header |
| 94 | + |
| 95 | +loop.4: |
| 96 | + %iv.4 = phi i32 [ 0, %ph ], [ %inc.i, %loop.4 ] |
| 97 | + call void @foo() |
| 98 | + %inc.i = add i32 %iv.4, 1 |
| 99 | + %ec = icmp eq i32 %iv.4, %iv.3 |
| 100 | + br i1 %ec, label %loop.1.latch, label %loop.4 |
| 101 | + |
| 102 | +loop.1.latch: |
| 103 | + br label %loop.1.header |
| 104 | +} |
| 105 | +;. |
| 106 | +; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]]} |
| 107 | +; CHECK: [[META1]] = !{!"llvm.loop.unroll.disable"} |
| 108 | +;. |
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