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[SelectionDAG] Remove NoInfsFPMath uses
1 parent d6d5026 commit fa27d74

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2 files changed

+5
-13
lines changed

2 files changed

+5
-13
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -17086,11 +17086,6 @@ static bool isContractableFMUL(const TargetOptions &Options, SDValue N) {
1708617086
N->getFlags().hasAllowContract();
1708717087
}
1708817088

17089-
// Returns true if `N` can assume no infinities involved in its computation.
17090-
static bool hasNoInfs(const TargetOptions &Options, SDValue N) {
17091-
return Options.NoInfsFPMath || N->getFlags().hasNoInfs();
17092-
}
17093-
1709417089
/// Try to perform FMA combining on a given FADD node.
1709517090
template <class MatchContextClass>
1709617091
SDValue DAGCombiner::visitFADDForFMACombine(SDNode *N) {
@@ -17666,7 +17661,7 @@ SDValue DAGCombiner::visitFMULForFMADistributiveCombine(SDNode *N) {
1766617661
// The transforms below are incorrect when x == 0 and y == inf, because the
1766717662
// intermediate multiplication produces a nan.
1766817663
SDValue FAdd = N0.getOpcode() == ISD::FADD ? N0 : N1;
17669-
if (!hasNoInfs(Options, FAdd))
17664+
if (FAdd->getFlags().hasNoInfs())
1767017665
return SDValue();
1767117666

1767217667
// Floating-point multiply-add without intermediate rounding.
@@ -18343,7 +18338,7 @@ template <class MatchContextClass> SDValue DAGCombiner::visitFMA(SDNode *N) {
1834318338
return matcher.getNode(ISD::FMA, DL, VT, NegN0, NegN1, N2);
1834418339
}
1834518340

18346-
if ((Options.NoNaNsFPMath && Options.NoInfsFPMath) ||
18341+
if (Options.NoNaNsFPMath ||
1834718342
(N->getFlags().hasNoNaNs() && N->getFlags().hasNoInfs())) {
1834818343
if (N->getFlags().hasNoSignedZeros() ||
1834918344
(N2CFP && !N2CFP->isExactlyValue(-0.0))) {
@@ -18533,7 +18528,6 @@ SDValue DAGCombiner::visitFDIV(SDNode *N) {
1853318528
SDValue N1 = N->getOperand(1);
1853418529
EVT VT = N->getValueType(0);
1853518530
SDLoc DL(N);
18536-
const TargetOptions &Options = DAG.getTarget().Options;
1853718531
SDNodeFlags Flags = N->getFlags();
1853818532
SelectionDAG::FlagInserter FlagsInserter(DAG, N);
1853918533

@@ -18644,7 +18638,7 @@ SDValue DAGCombiner::visitFDIV(SDNode *N) {
1864418638
}
1864518639

1864618640
// Fold into a reciprocal estimate and multiply instead of a real divide.
18647-
if (Options.NoInfsFPMath || Flags.hasNoInfs())
18641+
if (Flags.hasNoInfs())
1864818642
if (SDValue RV = BuildDivEstimate(N0, N1, Flags))
1864918643
return RV;
1865018644
}
@@ -18721,12 +18715,10 @@ SDValue DAGCombiner::visitFREM(SDNode *N) {
1872118715

1872218716
SDValue DAGCombiner::visitFSQRT(SDNode *N) {
1872318717
SDNodeFlags Flags = N->getFlags();
18724-
const TargetOptions &Options = DAG.getTarget().Options;
1872518718

1872618719
// Require 'ninf' flag since sqrt(+Inf) = +Inf, but the estimation goes as:
1872718720
// sqrt(+Inf) == rsqrt(+Inf) * +Inf = 0 * +Inf = NaN
18728-
if (!Flags.hasApproximateFuncs() ||
18729-
(!Options.NoInfsFPMath && !Flags.hasNoInfs()))
18721+
if (!Flags.hasApproximateFuncs() || !Flags.hasNoInfs())
1873018722
return SDValue();
1873118723

1873218724
SDValue N0 = N->getOperand(0);

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5771,7 +5771,7 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
57715771
return true;
57725772

57735773
const TargetOptions &Options = getTarget().Options;
5774-
return Options.NoNaNsFPMath || Options.NoInfsFPMath;
5774+
return Options.NoNaNsFPMath || Op->getFlags().hasNoInfs();
57755775
}
57765776

57775777
case ISD::OR:

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