File tree Expand file tree Collapse file tree 1 file changed +5
-3
lines changed Expand file tree Collapse file tree 1 file changed +5
-3
lines changed Original file line number Diff line number Diff line change @@ -1300,8 +1300,10 @@ void RISCVInsertVSETVLI::emitVSETVLIs(MachineBasicBlock &MBB) {
13001300 }
13011301}
13021302
1303- // / Return true if the VL value configured must be equal to the requested one.
1304- static bool hasFixedResult (const VSETVLIInfo &Info, const RISCVSubtarget &ST) {
1303+ // / Return true if the VL value configured by a vset(i)vli with the
1304+ // / provided Info must be equal to the requested AVL. That is, that
1305+ // / AVL <= VLMAX.
1306+ static bool willVLBeAVL (const VSETVLIInfo &Info, const RISCVSubtarget &ST) {
13051307 if (!Info.hasAVLImm ())
13061308 // VLMAX is always the same value.
13071309 // TODO: Could extend to other registers by looking at the associated vreg
@@ -1358,7 +1360,7 @@ void RISCVInsertVSETVLI::doPRE(MachineBasicBlock &MBB) {
13581360 return ;
13591361
13601362 // If VL can be less than AVL, then we can't reduce the frequency of exec.
1361- if (!hasFixedResult (AvailableInfo, ST))
1363+ if (!willVLBeAVL (AvailableInfo, ST))
13621364 return ;
13631365
13641366 // Model the effect of changing the input state of the block MBB to
You can’t perform that action at this time.
0 commit comments