@@ -48,30 +48,29 @@ using namespace llvm;
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namespace {
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class CodeEmitterGen {
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- const RecordKeeper &Records;
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+ const RecordKeeper &RK;
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+ CodeGenTarget Target;
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+ const CodeGenHwModes &CGH;
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public:
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- CodeEmitterGen (const RecordKeeper &R) : Records(R) {}
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+ explicit CodeEmitterGen (const RecordKeeper &RK);
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void run (raw_ostream &O);
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private:
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int getVariableBit (const std::string &VarName, const BitsInit *BI, int Bit);
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- std::pair<std::string, std::string>
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- getInstructionCases (const Record *R, const CodeGenTarget &Target);
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+ std::pair<std::string, std::string> getInstructionCases (const Record *R);
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void addInstructionCasesForEncoding (const Record *R,
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const Record *EncodingDef,
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- const CodeGenTarget &Target,
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std::string &Case,
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std::string &BitOffsetCase);
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bool addCodeToMergeInOperand (const Record *R, const BitsInit *BI,
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const std::string &VarName, std::string &Case,
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- std::string &BitOffsetCase,
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- const CodeGenTarget &Target);
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+ std::string &BitOffsetCase);
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void emitInstructionBaseValues (
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raw_ostream &O, ArrayRef<const CodeGenInstruction *> NumberedInstructions,
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- const CodeGenTarget &Target, unsigned HwMode = DefaultMode);
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+ unsigned HwMode = DefaultMode);
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void
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emitCaseMap (raw_ostream &O,
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const std::map<std::string, std::vector<std::string>> &CaseMap);
@@ -102,8 +101,7 @@ bool CodeEmitterGen::addCodeToMergeInOperand(const Record *R,
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const BitsInit *BI,
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const std::string &VarName,
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std::string &Case,
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- std::string &BitOffsetCase,
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- const CodeGenTarget &Target) {
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+ std::string &BitOffsetCase) {
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CodeGenInstruction &CGI = Target.getInstruction (R);
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// Determine if VarName actually contributes to the Inst encoding.
@@ -277,8 +275,7 @@ bool CodeEmitterGen::addCodeToMergeInOperand(const Record *R,
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}
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std::pair<std::string, std::string>
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- CodeEmitterGen::getInstructionCases (const Record *R,
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- const CodeGenTarget &Target) {
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+ CodeEmitterGen::getInstructionCases (const Record *R) {
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std::string Case, BitOffsetCase;
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auto Append = [&](const std::string &S) {
@@ -287,8 +284,7 @@ CodeEmitterGen::getInstructionCases(const Record *R,
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};
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if (const Record *RV = R->getValueAsOptionalDef (" EncodingInfos" )) {
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- const CodeGenHwModes &HWM = Target.getHwModes ();
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- EncodingInfoByHwMode EBM (RV, HWM);
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+ EncodingInfoByHwMode EBM (RV, CGH);
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// Invoke the interface to obtain the HwMode ID controlling the
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// EncodingInfo for the current subtarget. This interface will
@@ -304,7 +300,7 @@ CodeEmitterGen::getInstructionCases(const Record *R,
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" case " + itostr (DefaultMode) + " : InstBitsByHw = InstBits" ;
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} else {
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Case += " case " + itostr (ModeId) + " : InstBitsByHw = InstBits_" +
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- HWM .getMode (ModeId).Name .str ();
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+ CGH .getMode (ModeId).Name .str ();
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}
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Case += " ; break;\n " ;
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}
@@ -326,20 +322,20 @@ CodeEmitterGen::getInstructionCases(const Record *R,
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Append (" default: llvm_unreachable(\" Unhandled HwMode\" );\n " );
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for (auto &[ModeId, Encoding] : EBM) {
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Append (" case " + itostr (ModeId) + " : {\n " );
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- addInstructionCasesForEncoding (R, Encoding, Target, Case, BitOffsetCase);
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+ addInstructionCasesForEncoding (R, Encoding, Case, BitOffsetCase);
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Append (" break;\n " );
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Append (" }\n " );
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}
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Append (" }\n " );
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return {std::move (Case), std::move (BitOffsetCase)};
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}
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- addInstructionCasesForEncoding (R, R, Target, Case, BitOffsetCase);
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+ addInstructionCasesForEncoding (R, R, Case, BitOffsetCase);
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return {std::move (Case), std::move (BitOffsetCase)};
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}
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void CodeEmitterGen::addInstructionCasesForEncoding (
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- const Record *R, const Record *EncodingDef, const CodeGenTarget &Target ,
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- std::string &Case, std::string & BitOffsetCase) {
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+ const Record *R, const Record *EncodingDef, std::string &Case ,
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+ std::string &BitOffsetCase) {
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const BitsInit *BI = EncodingDef->getValueAsBitsInit (" Inst" );
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// Loop over all of the fields in the instruction, determining which are the
@@ -354,8 +350,8 @@ void CodeEmitterGen::addInstructionCasesForEncoding(
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if (RV.isNonconcreteOK () || RV.getValue ()->isComplete ())
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continue ;
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- Success &= addCodeToMergeInOperand (R, BI, RV. getName (). str (), Case,
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- BitOffsetCase, Target );
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+ Success &=
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+ addCodeToMergeInOperand (R, BI, RV. getName (). str (), Case, BitOffsetCase );
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}
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// Avoid empty switches.
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if (BitOffsetCase.size () == BitOffsetCaseSizeBeforeLoop)
@@ -389,19 +385,18 @@ static void emitInstBits(raw_ostream &OS, const APInt &Bits) {
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void CodeEmitterGen::emitInstructionBaseValues (
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raw_ostream &O, ArrayRef<const CodeGenInstruction *> NumberedInstructions,
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- const CodeGenTarget &Target, unsigned HwMode) {
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- const CodeGenHwModes &HWM = Target.getHwModes ();
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+ unsigned HwMode) {
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if (HwMode == DefaultMode)
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O << " static const uint64_t InstBits[] = {\n " ;
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else
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- O << " static const uint64_t InstBits_"
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- << HWM. getModeName (HwMode, /* IncludeDefault= */ true ) << " [] = {\n " ;
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+ O << " static const uint64_t InstBits_" << CGH. getModeName (HwMode)
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+ << " [] = {\n " ;
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for (const CodeGenInstruction *CGI : NumberedInstructions) {
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const Record *R = CGI->TheDef ;
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const Record *EncodingDef = R;
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if (const Record *RV = R->getValueAsOptionalDef (" EncodingInfos" )) {
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- EncodingInfoByHwMode EBM (RV, HWM );
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+ EncodingInfoByHwMode EBM (RV, CGH );
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if (EBM.hasMode (HwMode)) {
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EncodingDef = EBM.get (HwMode);
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} else {
@@ -447,29 +442,29 @@ void CodeEmitterGen::emitCaseMap(
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}
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}
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+ CodeEmitterGen::CodeEmitterGen (const RecordKeeper &RK)
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+ : RK(RK), Target(RK), CGH(Target.getHwModes()) {
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+ // For little-endian instruction bit encodings, reverse the bit order.
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+ Target.reverseBitsForLittleEndianEncoding ();
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+ }
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+
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void CodeEmitterGen::run (raw_ostream &O) {
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emitSourceFileHeader (" Machine Code Emitter" , O);
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- CodeGenTarget Target (Records);
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-
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- // For little-endian instruction bit encodings, reverse the bit order
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- Target.reverseBitsForLittleEndianEncoding ();
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-
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ArrayRef<const CodeGenInstruction *> EncodedInstructions =
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Target.getTargetNonPseudoInstructions ();
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if (Target.hasVariableLengthEncodings ()) {
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- emitVarLenCodeEmitter (Records , O);
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+ emitVarLenCodeEmitter (RK , O);
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return ;
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}
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- const CodeGenHwModes &HWM = Target.getHwModes ();
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// The set of HwModes used by instruction encodings.
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std::set<unsigned > HwModes;
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BitWidth = 0 ;
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for (const CodeGenInstruction *CGI : EncodedInstructions) {
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const Record *R = CGI->TheDef ;
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if (const Record *RV = R->getValueAsOptionalDef (" EncodingInfos" )) {
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- EncodingInfoByHwMode EBM (RV, HWM );
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+ EncodingInfoByHwMode EBM (RV, CGH );
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for (const auto &[Key, Value] : EBM) {
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const BitsInit *BI = Value->getValueAsBitsInit (" Inst" );
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BitWidth = std::max (BitWidth, BI->getNumBits ());
@@ -498,13 +493,13 @@ void CodeEmitterGen::run(raw_ostream &O) {
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}
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// Emit instruction base values
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- emitInstructionBaseValues (O, EncodedInstructions, Target, DefaultMode);
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+ emitInstructionBaseValues (O, EncodedInstructions, DefaultMode);
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if (!HwModes.empty ()) {
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// Emit table for instrs whose encodings are controlled by HwModes.
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for (unsigned HwMode : HwModes) {
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if (HwMode == DefaultMode)
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continue ;
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- emitInstructionBaseValues (O, EncodedInstructions, Target, HwMode);
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+ emitInstructionBaseValues (O, EncodedInstructions, HwMode);
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}
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// This pointer will be assigned to the HwMode table later.
@@ -521,7 +516,7 @@ void CodeEmitterGen::run(raw_ostream &O) {
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std::string InstName =
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(R->getValueAsString (" Namespace" ) + " ::" + R->getName ()).str ();
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std::string Case, BitOffsetCase;
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- std::tie (Case, BitOffsetCase) = getInstructionCases (R, Target );
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+ std::tie (Case, BitOffsetCase) = getInstructionCases (R);
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CaseMap[Case].push_back (InstName);
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BitOffsetCaseMap[BitOffsetCase].push_back (std::move (InstName));
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