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arsenmarsenm
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Fix offset 0 case with different register
1 parent 5e59c68 commit fb7d398

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5 files changed

+281
-9
lines changed

5 files changed

+281
-9
lines changed

‎llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2474,8 +2474,11 @@ bool SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
24742474
if (OtherOp.isImm())
24752475
NewOffset += OtherOp.getImm();
24762476

2477-
if (NewOffset == 0 && DeadSCC) {
2478-
MI->eraseFromParent();
2477+
if (NewOffset == 0 && DeadSCC && DstOp.getReg() == MaterializedReg) {
2478+
MI->removeOperand(3);
2479+
MI->removeOperand(FIOperandNum);
2480+
MI->setDesc(
2481+
TII->get(OtherOp.isReg() ? AMDGPU::COPY : AMDGPU::S_MOV_B32));
24792482
} else if (!MaterializedReg && OtherOp.isImm()) {
24802483
// In a kernel, the address should just be an immediate.
24812484
// SCC should really be dead, but preserve the def just in case it

‎llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,9 +15,11 @@ define amdgpu_kernel void @store_load_sindex_kernel(i32 %idx) {
1515
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1616
; GFX9-NEXT: s_lshl_b32 s1, s0, 2
1717
; GFX9-NEXT: s_and_b32 s0, s0, 15
18+
; GFX9-NEXT: s_add_i32 s1, s1, 0
1819
; GFX9-NEXT: s_lshl_b32 s0, s0, 2
1920
; GFX9-NEXT: scratch_store_dword off, v0, s1
2021
; GFX9-NEXT: s_waitcnt vmcnt(0)
22+
; GFX9-NEXT: s_add_i32 s0, s0, 0
2123
; GFX9-NEXT: scratch_load_dword v0, off, s0 glc
2224
; GFX9-NEXT: s_waitcnt vmcnt(0)
2325
; GFX9-NEXT: s_endpgm
@@ -34,6 +36,8 @@ define amdgpu_kernel void @store_load_sindex_kernel(i32 %idx) {
3436
; GFX10-NEXT: s_and_b32 s1, s0, 15
3537
; GFX10-NEXT: s_lshl_b32 s0, s0, 2
3638
; GFX10-NEXT: s_lshl_b32 s1, s1, 2
39+
; GFX10-NEXT: s_add_i32 s0, s0, 0
40+
; GFX10-NEXT: s_add_i32 s1, s1, 0
3741
; GFX10-NEXT: scratch_store_dword off, v0, s0
3842
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
3943
; GFX10-NEXT: scratch_load_dword v0, off, s1 glc dlc
@@ -47,9 +51,11 @@ define amdgpu_kernel void @store_load_sindex_kernel(i32 %idx) {
4751
; GFX940-NEXT: s_waitcnt lgkmcnt(0)
4852
; GFX940-NEXT: s_lshl_b32 s1, s0, 2
4953
; GFX940-NEXT: s_and_b32 s0, s0, 15
54+
; GFX940-NEXT: s_add_i32 s1, s1, 0
5055
; GFX940-NEXT: s_lshl_b32 s0, s0, 2
5156
; GFX940-NEXT: scratch_store_dword off, v0, s1 sc0 sc1
5257
; GFX940-NEXT: s_waitcnt vmcnt(0)
58+
; GFX940-NEXT: s_add_i32 s0, s0, 0
5359
; GFX940-NEXT: scratch_load_dword v0, off, s0 sc0 sc1
5460
; GFX940-NEXT: s_waitcnt vmcnt(0)
5561
; GFX940-NEXT: s_endpgm
@@ -62,6 +68,8 @@ define amdgpu_kernel void @store_load_sindex_kernel(i32 %idx) {
6268
; GFX11-NEXT: s_and_b32 s1, s0, 15
6369
; GFX11-NEXT: s_lshl_b32 s0, s0, 2
6470
; GFX11-NEXT: s_lshl_b32 s1, s1, 2
71+
; GFX11-NEXT: s_add_i32 s0, s0, 0
72+
; GFX11-NEXT: s_add_i32 s1, s1, 0
6573
; GFX11-NEXT: scratch_store_b32 off, v0, s0 dlc
6674
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
6775
; GFX11-NEXT: scratch_load_b32 v0, off, s1 glc dlc
@@ -76,6 +84,8 @@ define amdgpu_kernel void @store_load_sindex_kernel(i32 %idx) {
7684
; GFX12-NEXT: s_and_b32 s1, s0, 15
7785
; GFX12-NEXT: s_lshl_b32 s0, s0, 2
7886
; GFX12-NEXT: s_lshl_b32 s1, s1, 2
87+
; GFX12-NEXT: s_add_co_i32 s0, s0, 0
88+
; GFX12-NEXT: s_add_co_i32 s1, s1, 0
7989
; GFX12-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS
8090
; GFX12-NEXT: s_wait_storecnt 0x0
8191
; GFX12-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS

‎llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir‎

Lines changed: 212 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -260,25 +260,29 @@ body: |
260260
; MUBUFW64-NEXT: {{ $}}
261261
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
262262
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr8, implicit-def dead $scc
263+
; MUBUFW64-NEXT: renamable $sgpr7 = COPY $sgpr8
263264
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
264265
;
265266
; MUBUFW32-LABEL: name: s_add_i32__sgpr__fi_offset0
266267
; MUBUFW32: liveins: $sgpr8
267268
; MUBUFW32-NEXT: {{ $}}
268269
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
269270
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr8, implicit-def dead $scc
271+
; MUBUFW32-NEXT: renamable $sgpr7 = COPY $sgpr8
270272
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
271273
;
272274
; FLATSCRW64-LABEL: name: s_add_i32__sgpr__fi_offset0
273275
; FLATSCRW64: liveins: $sgpr8
274276
; FLATSCRW64-NEXT: {{ $}}
275277
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr8, implicit-def dead $scc
278+
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY $sgpr8
276279
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
277280
;
278281
; FLATSCRW32-LABEL: name: s_add_i32__sgpr__fi_offset0
279282
; FLATSCRW32: liveins: $sgpr8
280283
; FLATSCRW32-NEXT: {{ $}}
281284
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr8, implicit-def dead $scc
285+
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY $sgpr8
282286
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
283287
renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.0, implicit-def dead $scc
284288
SI_RETURN implicit $sgpr7
@@ -302,25 +306,29 @@ body: |
302306
; MUBUFW64-NEXT: {{ $}}
303307
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
304308
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr8, implicit-def dead $scc
309+
; MUBUFW64-NEXT: renamable $sgpr7 = COPY $sgpr8
305310
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
306311
;
307312
; MUBUFW32-LABEL: name: s_add_i32__fi_offset0__sgpr
308313
; MUBUFW32: liveins: $sgpr8
309314
; MUBUFW32-NEXT: {{ $}}
310315
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
311316
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr8, implicit-def dead $scc
317+
; MUBUFW32-NEXT: renamable $sgpr7 = COPY $sgpr8
312318
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
313319
;
314320
; FLATSCRW64-LABEL: name: s_add_i32__fi_offset0__sgpr
315321
; FLATSCRW64: liveins: $sgpr8
316322
; FLATSCRW64-NEXT: {{ $}}
317323
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr8, implicit-def dead $scc
324+
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY $sgpr8
318325
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
319326
;
320327
; FLATSCRW32-LABEL: name: s_add_i32__fi_offset0__sgpr
321328
; FLATSCRW32: liveins: $sgpr8
322329
; FLATSCRW32-NEXT: {{ $}}
323330
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr8, implicit-def dead $scc
331+
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY $sgpr8
324332
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
325333
renamable $sgpr7 = S_ADD_I32 %stack.0, $sgpr8, implicit-def dead $scc
326334
SI_RETURN implicit $sgpr7
@@ -928,3 +936,207 @@ body: |
928936
SI_RETURN implicit $sgpr7, implicit $scc
929937
930938
...
939+
940+
---
941+
name: s_add_i32__0__fi_offset0
942+
tracksRegLiveness: true
943+
stack:
944+
- { id: 0, size: 32, alignment: 16 }
945+
machineFunctionInfo:
946+
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
947+
frameOffsetReg: '$sgpr33'
948+
stackPtrOffsetReg: '$sgpr32'
949+
body: |
950+
bb.0:
951+
; MUBUFW64-LABEL: name: s_add_i32__0__fi_offset0
952+
; MUBUFW64: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
953+
; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 0
954+
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
955+
;
956+
; MUBUFW32-LABEL: name: s_add_i32__0__fi_offset0
957+
; MUBUFW32: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
958+
; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 0
959+
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
960+
;
961+
; FLATSCRW64-LABEL: name: s_add_i32__0__fi_offset0
962+
; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 $sgpr32, 0, implicit-def dead $scc
963+
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
964+
;
965+
; FLATSCRW32-LABEL: name: s_add_i32__0__fi_offset0
966+
; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 $sgpr32, 0, implicit-def dead $scc
967+
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
968+
renamable $sgpr7 = S_ADD_I32 0, %stack.0, implicit-def dead $scc
969+
SI_RETURN implicit $sgpr7
970+
971+
...
972+
973+
---
974+
name: s_add_i32__fi_offset0__0
975+
tracksRegLiveness: true
976+
stack:
977+
- { id: 0, size: 32, alignment: 16 }
978+
machineFunctionInfo:
979+
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
980+
frameOffsetReg: '$sgpr33'
981+
stackPtrOffsetReg: '$sgpr32'
982+
body: |
983+
bb.0:
984+
; MUBUFW64-LABEL: name: s_add_i32__fi_offset0__0
985+
; MUBUFW64: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
986+
; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 0
987+
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
988+
;
989+
; MUBUFW32-LABEL: name: s_add_i32__fi_offset0__0
990+
; MUBUFW32: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
991+
; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 0
992+
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
993+
;
994+
; FLATSCRW64-LABEL: name: s_add_i32__fi_offset0__0
995+
; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 0, $sgpr32, implicit-def dead $scc
996+
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
997+
;
998+
; FLATSCRW32-LABEL: name: s_add_i32__fi_offset0__0
999+
; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 0, $sgpr32, implicit-def dead $scc
1000+
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
1001+
renamable $sgpr7 = S_ADD_I32 %stack.0, 0, implicit-def dead $scc
1002+
SI_RETURN implicit $sgpr7
1003+
1004+
...
1005+
1006+
---
1007+
name: s_add_i32__same_sgpr__fi_offset0
1008+
tracksRegLiveness: true
1009+
stack:
1010+
- { id: 0, size: 32, alignment: 16 }
1011+
machineFunctionInfo:
1012+
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
1013+
frameOffsetReg: '$sgpr33'
1014+
stackPtrOffsetReg: '$sgpr32'
1015+
body: |
1016+
bb.0:
1017+
liveins: $sgpr7
1018+
; MUBUFW64-LABEL: name: s_add_i32__same_sgpr__fi_offset0
1019+
; MUBUFW64: liveins: $sgpr7
1020+
; MUBUFW64-NEXT: {{ $}}
1021+
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
1022+
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr7, implicit-def dead $scc
1023+
; MUBUFW64-NEXT: renamable $sgpr7 = COPY $sgpr7
1024+
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
1025+
;
1026+
; MUBUFW32-LABEL: name: s_add_i32__same_sgpr__fi_offset0
1027+
; MUBUFW32: liveins: $sgpr7
1028+
; MUBUFW32-NEXT: {{ $}}
1029+
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
1030+
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr7, implicit-def dead $scc
1031+
; MUBUFW32-NEXT: renamable $sgpr7 = COPY $sgpr7
1032+
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
1033+
;
1034+
; FLATSCRW64-LABEL: name: s_add_i32__same_sgpr__fi_offset0
1035+
; FLATSCRW64: liveins: $sgpr7
1036+
; FLATSCRW64-NEXT: {{ $}}
1037+
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr7, implicit-def dead $scc
1038+
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY $sgpr7
1039+
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
1040+
;
1041+
; FLATSCRW32-LABEL: name: s_add_i32__same_sgpr__fi_offset0
1042+
; FLATSCRW32: liveins: $sgpr7
1043+
; FLATSCRW32-NEXT: {{ $}}
1044+
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr7, implicit-def dead $scc
1045+
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY $sgpr7
1046+
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
1047+
renamable $sgpr7 = S_ADD_I32 $sgpr7, %stack.0, implicit-def dead $scc
1048+
SI_RETURN implicit $sgpr7
1049+
1050+
...
1051+
1052+
---
1053+
name: s_add_i32__different_sgpr__fi_offset0
1054+
tracksRegLiveness: true
1055+
stack:
1056+
- { id: 0, size: 32, alignment: 16 }
1057+
machineFunctionInfo:
1058+
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
1059+
frameOffsetReg: '$sgpr33'
1060+
stackPtrOffsetReg: '$sgpr32'
1061+
body: |
1062+
bb.0:
1063+
liveins: $sgpr8
1064+
; MUBUFW64-LABEL: name: s_add_i32__different_sgpr__fi_offset0
1065+
; MUBUFW64: liveins: $sgpr8
1066+
; MUBUFW64-NEXT: {{ $}}
1067+
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
1068+
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr8, implicit-def dead $scc
1069+
; MUBUFW64-NEXT: renamable $sgpr7 = COPY $sgpr8
1070+
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
1071+
;
1072+
; MUBUFW32-LABEL: name: s_add_i32__different_sgpr__fi_offset0
1073+
; MUBUFW32: liveins: $sgpr8
1074+
; MUBUFW32-NEXT: {{ $}}
1075+
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
1076+
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr8, implicit-def dead $scc
1077+
; MUBUFW32-NEXT: renamable $sgpr7 = COPY $sgpr8
1078+
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
1079+
;
1080+
; FLATSCRW64-LABEL: name: s_add_i32__different_sgpr__fi_offset0
1081+
; FLATSCRW64: liveins: $sgpr8
1082+
; FLATSCRW64-NEXT: {{ $}}
1083+
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr8, implicit-def dead $scc
1084+
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY $sgpr8
1085+
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
1086+
;
1087+
; FLATSCRW32-LABEL: name: s_add_i32__different_sgpr__fi_offset0
1088+
; FLATSCRW32: liveins: $sgpr8
1089+
; FLATSCRW32-NEXT: {{ $}}
1090+
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr8, implicit-def dead $scc
1091+
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY $sgpr8
1092+
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
1093+
renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.0, implicit-def dead $scc
1094+
SI_RETURN implicit $sgpr7
1095+
1096+
...
1097+
1098+
---
1099+
name: s_add_i32__different_sgpr__fi_offset0_live_after
1100+
tracksRegLiveness: true
1101+
stack:
1102+
- { id: 0, size: 32, alignment: 16 }
1103+
machineFunctionInfo:
1104+
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
1105+
frameOffsetReg: '$sgpr33'
1106+
stackPtrOffsetReg: '$sgpr32'
1107+
body: |
1108+
bb.0:
1109+
liveins: $sgpr8
1110+
; MUBUFW64-LABEL: name: s_add_i32__different_sgpr__fi_offset0_live_after
1111+
; MUBUFW64: liveins: $sgpr8
1112+
; MUBUFW64-NEXT: {{ $}}
1113+
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
1114+
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr8, implicit-def dead $scc
1115+
; MUBUFW64-NEXT: renamable $sgpr7 = COPY $sgpr8
1116+
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $sgpr8
1117+
;
1118+
; MUBUFW32-LABEL: name: s_add_i32__different_sgpr__fi_offset0_live_after
1119+
; MUBUFW32: liveins: $sgpr8
1120+
; MUBUFW32-NEXT: {{ $}}
1121+
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
1122+
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr7, $sgpr8, implicit-def dead $scc
1123+
; MUBUFW32-NEXT: renamable $sgpr7 = COPY $sgpr8
1124+
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $sgpr8
1125+
;
1126+
; FLATSCRW64-LABEL: name: s_add_i32__different_sgpr__fi_offset0_live_after
1127+
; FLATSCRW64: liveins: $sgpr8
1128+
; FLATSCRW64-NEXT: {{ $}}
1129+
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr8, implicit-def dead $scc
1130+
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY $sgpr8
1131+
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $sgpr8
1132+
;
1133+
; FLATSCRW32-LABEL: name: s_add_i32__different_sgpr__fi_offset0_live_after
1134+
; FLATSCRW32: liveins: $sgpr8
1135+
; FLATSCRW32-NEXT: {{ $}}
1136+
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, $sgpr8, implicit-def dead $scc
1137+
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY $sgpr8
1138+
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $sgpr8
1139+
renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.0, implicit-def dead $scc
1140+
SI_RETURN implicit $sgpr7, implicit $sgpr8
1141+
1142+
...

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