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Use absoluteSymbolDiff, add target hook for whether to prefer using relocs
Specifically: bbea642 took away a hook for whether a target wanted symbol differences to be expressed in relocations or not, and here I've found a use case for it.
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3 files changed

+26
-11
lines changed

3 files changed

+26
-11
lines changed

llvm/include/llvm/MC/MCAsmBackend.h

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Original file line numberDiff line numberDiff line change
@@ -135,6 +135,10 @@ class MCAsmBackend {
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uint64_t Value, bool IsResolved,
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const MCSubtargetInfo *STI) const = 0;
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/// Check whether the given target requires emitting differences of two
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/// symbols as a set of relocations.
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virtual bool requiresDiffExpressionRelocations() const { return false; }
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/// @}
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/// \name Target Relaxation Interfaces

llvm/lib/MC/MCObjectStreamer.cpp

Lines changed: 8 additions & 11 deletions
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@@ -469,17 +469,14 @@ void MCObjectStreamer::emitDwarfAdvanceLineAddr(int64_t LineDelta,
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// fragment, then the address-offset is already a fixed constant and is not
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// relaxable. Emit the advance-line-addr data immediately to save time and
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// memory.
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// As per commit bbea64250f6548, RISCV always desires symbolic relocations.
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MCFragment *LastFrag = LastLabel->getFragment();
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if (!getAssembler().getContext().getTargetTriple().isRISCV() &&
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LastFrag->getKind() == MCFragment::FT_Data &&
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Label->getFragment() == LastFrag) {
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uint64_t AddrDelta = Label->getOffset() - LastLabel->getOffset();
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SmallString<16> Tmp;
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MCDwarfLineAddr::encode(getContext(), Assembler->getDWARFLinetableParams(),
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LineDelta, AddrDelta, Tmp);
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emitBytes(Tmp);
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return;
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if (!Assembler->getBackend().requiresDiffExpressionRelocations()) {
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if (auto OptAddrDelta = absoluteSymbolDiff(Label, LastLabel)) {
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SmallString<16> Tmp;
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MCDwarfLineAddr::encode(getContext(), Assembler->getDWARFLinetableParams(),
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LineDelta, *OptAddrDelta, Tmp);
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emitBytes(Tmp);
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return;
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}
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}
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const MCExpr *AddrDelta = buildSymbolDiff(*this, Label, LastLabel, SMLoc());

llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h

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Original file line numberDiff line numberDiff line change
@@ -35,6 +35,20 @@ class RISCVAsmBackend : public MCAsmBackend {
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void setForceRelocs() { ForceRelocs = true; }
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// Returns true if relocations will be forced for shouldForceRelocation by
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// default. This will be true if relaxation is enabled or had previously
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// been enabled.
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bool willForceRelocations() const {
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return ForceRelocs || STI.getFeatureBits()[RISCV::FeatureRelax];
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}
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// Generate diff expression relocations if the relax feature is enabled or had
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// previously been enabled, otherwise it is safe for the assembler to
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// calculate these internally.
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bool requiresDiffExpressionRelocations() const override {
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return willForceRelocations();
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}
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// Return Size with extra Nop Bytes for alignment directive in code section.
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bool shouldInsertExtraNopBytesForCodeAlign(const MCAlignFragment &AF,
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unsigned &Size) override;

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