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1 parent 17b720e commit fc69e5bCopy full SHA for fc69e5b
mlir/test/Conversion/SPIRVToLLVM/control-flow-ops-to-llvm.mlir
@@ -86,6 +86,14 @@ spirv.module Logical GLSL450 {
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//===----------------------------------------------------------------------===//
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spirv.module Logical GLSL450 {
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+ // CHECK-LABEL: @empty_loop
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+ spirv.func @empty_loop() "None" {
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+ // CHECK: llvm.return
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+ spirv.mlir.loop {
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+ }
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+ spirv.Return
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+
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// CHECK-LABEL: @infinite_loop
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spirv.func @infinite_loop(%count : i32) -> () "None" {
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// CHECK: llvm.br ^[[BB1:.*]]
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