address comments

Author: AlexMaclean

llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

@@ -2764,11 +2764,11 @@ static SDValue lowerCTLZCTPOP(SDValue Op, SelectionDAG &DAG) {
   return DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, CT, SDNodeFlags::NonNeg);
 }
 
-static SDValue expandFSH64(SDValue A, SDValue B, SDValue AmtVal, SDLoc DL,
+static SDValue expandFSH64(SDValue A, SDValue B, SDValue ShiftAmount, SDLoc DL,
                            unsigned Opcode, SelectionDAG &DAG) {
   assert(A.getValueType() == MVT::i64 && B.getValueType() == MVT::i64);
 
-  const auto *AmtConst = dyn_cast<ConstantSDNode>(AmtVal);
+  const auto *AmtConst = dyn_cast<ConstantSDNode>(ShiftAmount);
   if (!AmtConst)
     return SDValue();
   const auto Amt = AmtConst->getZExtValue() & 63;

llvm/lib/Target/NVPTX/NVPTXISelLowering.h

@@ -61,8 +61,17 @@ enum NodeType : unsigned {
   BFE,
   BFI,
   PRMT,
-  UNPACK_VECTOR,
+
+  /// This node is similar to ISD::BUILD_VECTOR except that the output may be
+  /// implicitly bitcast to a scalar. This allows for the representation of
+  /// packing move instructions for vector types which are not legal i.e. v2i32
   BUILD_VECTOR,
+
+  /// This node is the inverse of NVPTX::BUILD_VECTOR. It takes a single value
+  /// which may be a scalar and unpacks it into multiple values by implicitly
+  /// converting it to a vector.
+  UNPACK_VECTOR,
+
   FCOPYSIGN,
   DYNAMIC_STACKALLOC,
   STACKRESTORE,