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The JAL in Long Branches cannot be relaxed further
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2 files changed

+10
-16
lines changed

2 files changed

+10
-16
lines changed

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -664,13 +664,15 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
664664
AsmRelaxToLinkerRelaxableWithFeature(RISCV::FeatureVendorXqcilb);
665665
} else if (MIFrm == RISCVII::InstFormatB) {
666666
FixupKind = RISCV::fixup_riscv_branch;
667-
AsmRelaxToLinkerRelaxable();
667+
// This might be assembler relaxed to `b<cc>; jal` but we cannot relax
668+
// the `jal` again in the assembler.
668669
} else if (MIFrm == RISCVII::InstFormatCJ) {
669670
FixupKind = RISCV::fixup_riscv_rvc_jump;
670671
AsmRelaxToLinkerRelaxableWithFeature(RISCV::FeatureVendorXqcilb);
671672
} else if (MIFrm == RISCVII::InstFormatCB) {
672673
FixupKind = RISCV::fixup_riscv_rvc_branch;
673-
AsmRelaxToLinkerRelaxable();
674+
// This might be assembler relaxed to `b<cc>; jal` but we cannot relax
675+
// the `jal` again in the assembler.
674676
} else if (MIFrm == RISCVII::InstFormatCI) {
675677
FixupKind = RISCV::fixup_riscv_rvc_imm;
676678
} else if (MIFrm == RISCVII::InstFormatI) {

llvm/test/MC/RISCV/align.s

Lines changed: 6 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -137,18 +137,14 @@ data2:
137137

138138
## Branches crossing the linker-relaxable R_RISCV_ALIGN need relocations.
139139
# RELAX-RELOC: .rela.text3 {
140-
# RELAX-RELOC-NEXT: 0x0 R_RISCV_BRANCH .Ltmp[[#]] 0x0
141-
# RELAX-RELOC-NEXT: 0x4 R_RISCV_BRANCH .Ltmp[[#]] 0x0
142-
# RELAX-RELOC-NEXT: 0x8 R_RISCV_ALIGN - 0x4
143-
# RELAX-RELOC-NEXT: 0xC R_RISCV_BRANCH .Ltmp[[#]] 0x0
144-
# RELAX-RELOC-NEXT: 0x10 R_RISCV_BRANCH .Ltmp[[#]] 0x0
140+
# RELAX-RELOC-NEXT: 0x4 R_RISCV_BRANCH .Ltmp[[#]] 0x0
141+
# RELAX-RELOC-NEXT: 0x8 R_RISCV_ALIGN - 0x4
142+
# RELAX-RELOC-NEXT: 0xC R_RISCV_BRANCH .Ltmp[[#]] 0x0
145143
# RELAX-RELOC-NEXT: }
146144
# C-OR-ZCA-EXT-RELAX-RELOC: .rela.text3 {
147-
# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0x0 R_RISCV_BRANCH .Ltmp[[#]] 0x0
148-
# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0x4 R_RISCV_BRANCH .Ltmp[[#]] 0x0
149-
# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0x8 R_RISCV_ALIGN - 0x4
150-
# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0xC R_RISCV_BRANCH .Ltmp[[#]] 0x0
151-
# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0x10 R_RISCV_BRANCH .Ltmp[[#]] 0x0
145+
# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0x4 R_RISCV_BRANCH .Ltmp[[#]] 0x0
146+
# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0x8 R_RISCV_ALIGN - 0x4
147+
# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: 0xC R_RISCV_BRANCH .Ltmp[[#]] 0x0
152148
# C-OR-ZCA-EXT-RELAX-RELOC-NEXT: }
153149
.section .text3, "ax"
154150
bnez t1, 1f
@@ -165,11 +161,9 @@ data2:
165161
# RELAX-RELOC: .rela.text3a {
166162
# RELAX-RELOC-NEXT: 0x0 R_RISCV_CALL_PLT foo 0x0
167163
# RELAX-RELOC-NEXT: 0x0 R_RISCV_RELAX - 0x0
168-
# RELAX-RELOC-NEXT: 0x8 R_RISCV_BRANCH .Ltmp[[#]] 0x0
169164
# RELAX-RELOC-NEXT: 0xC R_RISCV_BRANCH .Ltmp[[#]] 0x0
170165
# RELAX-RELOC-NEXT: 0x10 R_RISCV_ALIGN - 0x4
171166
# RELAX-RELOC-NEXT: 0x14 R_RISCV_BRANCH .Ltmp[[#]] 0x0
172-
# RELAX-RELOC-NEXT: 0x18 R_RISCV_BRANCH .Ltmp[[#]] 0x0
173167
# RELAX-RELOC-NEXT: }
174168
.section .text3a, "ax"
175169
call foo
@@ -183,11 +177,9 @@ bnez t1, 2b
183177

184178
## .text3 with a call at the end
185179
# RELAX-RELOC: .rela.text3b {
186-
# RELAX-RELOC-NEXT: 0x0 R_RISCV_BRANCH .Ltmp[[#]] 0x0
187180
# RELAX-RELOC-NEXT: 0x4 R_RISCV_BRANCH .Ltmp[[#]] 0x0
188181
# RELAX-RELOC-NEXT: 0x8 R_RISCV_ALIGN - 0x4
189182
# RELAX-RELOC-NEXT: 0xC R_RISCV_BRANCH .Ltmp[[#]] 0x0
190-
# RELAX-RELOC-NEXT: 0x10 R_RISCV_BRANCH .Ltmp[[#]] 0x0
191183
# RELAX-RELOC-NEXT: 0x14 R_RISCV_CALL_PLT foo 0x0
192184
# RELAX-RELOC-NEXT: 0x14 R_RISCV_RELAX - 0x0
193185
# RELAX-RELOC-NEXT: }

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