AMDGPU: Migrate more tests away from undef

andorbitset.ll is interesting since it directly depends on the
difference between poison and undef. Not sure it's useful to keep
the version using poison, I assume none of this code makes it to
codegen.

si-spill-cf.ll was also a nasty case, which I doubt has been reproducing
its original issue for a very long time. I had to reclaim an older version,
replace some of the poison uses, and run simplify-cfg. There's a very
slight change in the final CFG with this, but final the output is approximately
the same as it used to be.

Author: arsenm

llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll

@@ -55,7 +55,7 @@ define <2 x i32> @select_sdiv_lhs_const_v2i32(i1 %cond) {
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0x594
 ; GCN-NEXT:    s_setpc_b64 s[30:31]
-  %select = select i1 %cond, <2 x i32> <i32 5, i32 undef>, <2 x i32> <i32 6, i32 7>
+  %select = select i1 %cond, <2 x i32> <i32 5, i32 poison>, <2 x i32> <i32 6, i32 7>
   %op = sdiv <2 x i32> <i32 3333, i32 9999>, %select
   ret <2 x i32> %op
 }

llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll

@@ -106,8 +106,8 @@ define amdgpu_kernel void @s_set_midbit(ptr addrspace(1) %out, i32 %in) {
 @gv = external addrspace(1) global i32
 
 ; Make sure there's no verifier error with an undef source.
-define void @bitset_verifier_error() local_unnamed_addr #0 {
-; SI-LABEL: bitset_verifier_error:
+define void @bitset_verifier_error_freeze_poison() local_unnamed_addr #0 {
+; SI-LABEL: bitset_verifier_error_freeze_poison:
 ; SI:       ; %bb.0: ; %bb
 ; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
 ; SI-NEXT:    s_getpc_b64 s[4:5]
@@ -128,13 +128,40 @@ define void @bitset_verifier_error() local_unnamed_addr #0 {
 ; SI-NEXT:  ; %bb.1: ; %bb5
 ; SI-NEXT:  .LBB6_2: ; %bb6
 bb:
-  %i = call float @llvm.fabs.f32(float undef) #0
+  %undef0 = freeze float poison
+  %i = call float @llvm.fabs.f32(float %undef0) #0
   %i1 = bitcast float %i to i32
   store i32 %i1, ptr addrspace(1) @gv
   br label %bb2
 
 bb2:
-  %i3 = call float @llvm.fabs.f32(float undef) #0
+  %undef1 = freeze float poison
+  %i3 = call float @llvm.fabs.f32(float %undef1) #0
+  %i4 = fcmp fast ult float %i3, 0x3FEFF7CEE0000000
+  br i1 %i4, label %bb5, label %bb6
+
+bb5:
+  unreachable
+
+bb6:
+  unreachable
+}
+
+define void @bitset_verifier_error_poison() local_unnamed_addr #0 {
+; SI-LABEL: bitset_verifier_error_poison:
+; SI:       ; %bb.0: ; %bb
+; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; SI-NEXT:    s_cbranch_scc1 .LBB7_2
+; SI-NEXT:  ; %bb.1: ; %bb5
+; SI-NEXT:  .LBB7_2: ; %bb6
+bb:
+  %i = call float @llvm.fabs.f32(float poison) #0
+  %i1 = bitcast float %i to i32
+  store i32 %i1, ptr addrspace(1) @gv
+  br label %bb2
+
+bb2:
+  %i3 = call float @llvm.fabs.f32(float poison) #0
   %i4 = fcmp fast ult float %i3, 0x3FEFF7CEE0000000
   br i1 %i4, label %bb5, label %bb6
 

llvm/test/CodeGen/AMDGPU/andorbitset.ll

@@ -37,11 +37,12 @@ bb2:
 define amdgpu_kernel void @preserve_condition_undef_flag(float %arg, i32 %arg1, float %arg2) {
 bb0:
   %tmp = icmp sgt i32 %arg1, 4
-  %undef = call i1 @llvm.amdgcn.class.f32(float poison, i32 undef)
-  %tmp4 = select i1 %undef, float %arg, float 1.000000e+00
+  %mask = freeze i32 poison
+  %undef0 = call i1 @llvm.amdgcn.class.f32(float poison, i32 %mask)
+  %tmp4 = select i1 %undef0, float %arg, float 1.000000e+00
   %tmp5 = fcmp ogt float %arg2, 0.000000e+00
   %tmp6 = fcmp olt float %arg2, 1.000000e+00
-  %tmp7 = fcmp olt float %arg, undef
+  %tmp7 = fcmp olt float %arg, poison
   %tmp8 = and i1 %tmp5, %tmp6
   %tmp9 = and i1 %tmp8, %tmp7
   br i1 %tmp9, label %bb1, label %bb2