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5 files changed

+35
-14
lines changed

5 files changed

+35
-14
lines changed

clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp

Lines changed: 13 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -540,12 +540,20 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
540540
}
541541

542542
// Now see if we can emit a target-specific builtin.
543-
if (mlir::Value v = emitTargetBuiltinExpr(builtinID, e, returnValue)) {
543+
std::optional<mlir::Value> valueOpt =
544+
emitTargetBuiltinExpr(builtinID, e, returnValue);
545+
if (valueOpt) {
546+
// A builtin was emitted but had no return value.
547+
if (*valueOpt == nullptr) {
548+
return RValue::get(nullptr);
549+
}
550+
544551
switch (evalKind) {
545552
case cir::TEK_Scalar:
546-
if (mlir::isa<cir::VoidType>(v.getType()))
553+
if (mlir::isa<cir::VoidType>(valueOpt->getType())) {
547554
return RValue::get(nullptr);
548-
return RValue::get(v);
555+
}
556+
return RValue::get(*valueOpt);
549557
case cir::TEK_Aggregate:
550558
cgm.errorNYI(e->getSourceRange(), "aggregate return value from builtin");
551559
return getUndefRValue(e->getType());
@@ -561,7 +569,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
561569
return getUndefRValue(e->getType());
562570
}
563571

564-
static mlir::Value emitTargetArchBuiltinExpr(CIRGenFunction *cgf,
572+
static std::optional<mlir::Value> emitTargetArchBuiltinExpr(CIRGenFunction *cgf,
565573
unsigned builtinID,
566574
const CallExpr *e,
567575
ReturnValueSlot &returnValue,
@@ -616,7 +624,7 @@ static mlir::Value emitTargetArchBuiltinExpr(CIRGenFunction *cgf,
616624
}
617625
}
618626

619-
mlir::Value
627+
std::optional<mlir::Value>
620628
CIRGenFunction::emitTargetBuiltinExpr(unsigned builtinID, const CallExpr *e,
621629
ReturnValueSlot &returnValue) {
622630
if (getContext().BuiltinInfo.isAuxBuiltinID(builtinID)) {

clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,10 @@ static mlir::Value emitPrefetch(CIRGenFunction &cgf, unsigned builtinID,
4848
bool isWrite{};
4949
int locality{};
5050

51+
assert(builtinID == X86::BI_mm_prefetch ||
52+
builtinID == X86::BI_m_prefetchw ||
53+
builtinID == X86::BI_m_prefetch && "Expected prefetch builtin");
54+
5155
if (builtinID == X86::BI_mm_prefetch) {
5256
int hint = getIntValueFromConstOp(ops[1]);
5357
isWrite = (hint >> 2) & 0x1;
@@ -61,7 +65,7 @@ static mlir::Value emitPrefetch(CIRGenFunction &cgf, unsigned builtinID,
6165
return {};
6266
}
6367

64-
mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
68+
std::optional<mlir::Value> CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
6569
const CallExpr *e) {
6670
if (builtinID == Builtin::BI__builtin_cpu_is) {
6771
cgm.errorNYI(e->getSourceRange(), "__builtin_cpu_is");

clang/lib/CIR/CodeGen/CIRGenFunction.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1746,7 +1746,7 @@ class CIRGenFunction : public CIRGenTypeCache {
17461746
bool buildingTopLevelCase);
17471747
mlir::LogicalResult emitSwitchStmt(const clang::SwitchStmt &s);
17481748

1749-
mlir::Value emitTargetBuiltinExpr(unsigned builtinID,
1749+
std::optional<mlir::Value> emitTargetBuiltinExpr(unsigned builtinID,
17501750
const clang::CallExpr *e,
17511751
ReturnValueSlot &returnValue);
17521752

@@ -1788,7 +1788,7 @@ class CIRGenFunction : public CIRGenTypeCache {
17881788

17891789
mlir::LogicalResult emitWhileStmt(const clang::WhileStmt &s);
17901790

1791-
mlir::Value emitX86BuiltinExpr(unsigned builtinID, const CallExpr *e);
1791+
std::optional<mlir::Value> emitX86BuiltinExpr(unsigned builtinID, const CallExpr *e);
17921792

17931793
/// Given an assignment `*lhs = rhs`, emit a test that checks if \p rhs is
17941794
/// nonnull, if 1\p LHS is marked _Nonnull.

clang/test/CIR/CodeGen/X86/prefetchw-builtin.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -20,17 +20,17 @@ void test_m_prefetch_w(void *p) {
2020
// LLVM-LABEL: test_m_prefetch_w
2121
// OGCG-LABEL: test_m_prefetch_w
2222
return _m_prefetchw(p);
23-
// CIR: cir.prefetch write locality(0) %{{.*}} : !cir.ptr<!void>
24-
// LLVM: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 0, i32 1)
25-
// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 0, i32 1)
23+
// CIR: cir.prefetch write locality(3) %{{.*}} : !cir.ptr<!void>
24+
// LLVM: call void @llvm.prefetch.p0(ptr {{.*}}, i32 1, i32 3, i32 1)
25+
// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 1, i32 3, i32 1)
2626
}
2727

2828
void test_m_prefetch(void *p) {
2929
// CIR-LABEL: test_m_prefetch
3030
// LLVM-LABEL: test_m_prefetch
3131
// OGCG-LABEL: test_m_prefetch
3232
return _m_prefetch(p);
33-
// CIR: cir.prefetch read locality(0) %{{.*}} : !cir.ptr<!void>
34-
// LLVM: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 0, i32 1)
35-
// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 0, i32 1)
33+
// CIR: cir.prefetch read locality(3) %{{.*}} : !cir.ptr<!void>
34+
// LLVM: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 3, i32 1)
35+
// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 3, i32 1)
3636
}

clang/test/CIR/CodeGen/X86/sse-builtins.c

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,3 +44,12 @@ void test_mm_prefetch_local(char const* p) {
4444
// LLVM: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 3, i32 1)
4545
// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 3, i32 1)
4646
}
47+
48+
void test_mm_prefetch_write(char const* p) {
49+
// CIR-LABEL: test_mm_prefetch_write
50+
// LLVM-LABEL: test_mm_prefetch_write
51+
_mm_prefetch(p, 7);
52+
// CIR: cir.prefetch write locality(3) %{{.*}} : !cir.ptr<!void>
53+
// LLVM: call void @llvm.prefetch.p0(ptr {{.*}}, i32 1, i32 3, i32 1)
54+
// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 1, i32 3, i32 1)
55+
}

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