update new tc

Author: lei137

llvm/test/CodeGen/PowerPC/dmf-outer-product.ll

@@ -11,9 +11,9 @@ declare <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4(<256 x i1>, <16 x i8>)
 define void @test_dmxvi8gerx4(ptr %vpp, ptr %vcp, ptr %resp) {
 ; CHECK-LABEL: test_dmxvi8gerx4:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    lxv v3, 0(r3)
-; CHECK-NEXT:    lxv vs0, 0(r4)
 ; CHECK-NEXT:    lxv v2, 16(r3)
+; CHECK-NEXT:    lxv vs0, 0(r4)
+; CHECK-NEXT:    lxv v3, 0(r3)
 ; CHECK-NEXT:    dmxvi8gerx4 dmr0, vsp34, vs0
 ; CHECK-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
 ; CHECK-NEXT:    stxvp vsp34, 96(r5)
@@ -25,9 +25,9 @@ define void @test_dmxvi8gerx4(ptr %vpp, ptr %vcp, ptr %resp) {
 ;
 ; CHECK-BE-LABEL: test_dmxvi8gerx4:
 ; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:    lxv v3, 16(r3)
-; CHECK-BE-NEXT:    lxv vs0, 0(r4)
 ; CHECK-BE-NEXT:    lxv v2, 0(r3)
+; CHECK-BE-NEXT:    lxv vs0, 0(r4)
+; CHECK-BE-NEXT:    lxv v3, 16(r3)
 ; CHECK-BE-NEXT:    dmxvi8gerx4 dmr0, vsp34, vs0
 ; CHECK-BE-NEXT:    dmxxextfdmr512 wacc_hi0, vsp34, vsp36, 1
 ; CHECK-BE-NEXT:    stxvp vsp36, 96(r5)
@@ -55,9 +55,9 @@ define void @test_dmxvi8gerx4pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
 ; CHECK-NEXT:    lxvp vsp34, 64(r3)
 ; CHECK-NEXT:    lxvp vsp36, 96(r3)
 ; CHECK-NEXT:    dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
-; CHECK-NEXT:    lxv v3, 0(r4)
-; CHECK-NEXT:    lxv vs0, 0(r5)
 ; CHECK-NEXT:    lxv v2, 16(r4)
+; CHECK-NEXT:    lxv vs0, 0(r5)
+; CHECK-NEXT:    lxv v3, 0(r4)
 ; CHECK-NEXT:    dmxvi8gerx4pp dmr0, vsp34, vs0
 ; CHECK-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
 ; CHECK-NEXT:    stxvp vsp34, 96(r6)
@@ -69,23 +69,23 @@ define void @test_dmxvi8gerx4pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
 ;
 ; CHECK-BE-LABEL: test_dmxvi8gerx4pp:
 ; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:  lxvp vsp34, 96(r3)
-; CHECK-BE-NEXT:  lxvp vsp36, 64(r3)
-; CHECK-BE-NEXT:  dmxxinstfdmr512 wacc_hi0, vsp36, vsp34, 1
-; CHECK-BE-NEXT:  lxvp vsp34, 32(r3)
-; CHECK-BE-NEXT:  lxvp vsp36, 0(r3)
-; CHECK-BE-NEXT:  dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
-; CHECK-BE-NEXT:  lxv v3, 16(r4)
-; CHECK-BE-NEXT:  lxv vs0, 0(r5)
-; CHECK-BE-NEXT:  lxv v2, 0(r4)
-; CHECK-BE-NEXT:  dmxvi8gerx4pp dmr0, vsp34, vs0
-; CHECK-BE-NEXT:  dmxxextfdmr512 wacc_hi0, vsp34, vsp36, 1
-; CHECK-BE-NEXT:  stxvp vsp36, 96(r6)
-; CHECK-BE-NEXT:  stxvp vsp34, 64(r6)
-; CHECK-BE-NEXT:  dmxxextfdmr512 wacc0, vsp34, vsp36, 0
-; CHECK-BE-NEXT:  stxvp vsp36, 32(r6)
-; CHECK-BE-NEXT:  stxvp vsp34, 0(r6)
-; CHECK-BE-NEXT:  blr
+; CHECK-BE-NEXT:    lxvp vsp34, 96(r3)
+; CHECK-BE-NEXT:    lxvp vsp36, 64(r3)
+; CHECK-BE-NEXT:    dmxxinstfdmr512 wacc_hi0, vsp36, vsp34, 1
+; CHECK-BE-NEXT:    lxvp vsp34, 32(r3)
+; CHECK-BE-NEXT:    lxvp vsp36, 0(r3)
+; CHECK-BE-NEXT:    dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
+; CHECK-BE-NEXT:    lxv v2, 0(r4)
+; CHECK-BE-NEXT:    lxv vs0, 0(r5)
+; CHECK-BE-NEXT:    lxv v3, 16(r4)
+; CHECK-BE-NEXT:    dmxvi8gerx4pp dmr0, vsp34, vs0
+; CHECK-BE-NEXT:    dmxxextfdmr512 wacc_hi0, vsp34, vsp36, 1
+; CHECK-BE-NEXT:    stxvp vsp36, 96(r6)
+; CHECK-BE-NEXT:    stxvp vsp34, 64(r6)
+; CHECK-BE-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
+; CHECK-BE-NEXT:    stxvp vsp36, 32(r6)
+; CHECK-BE-NEXT:    stxvp vsp34, 0(r6)
+; CHECK-BE-NEXT:    blr
 entry:
   %v.dmr = load <1024 x i1>, ptr %vop, align 64
   %v1 = load <256 x i1>, ptr %vpp, align 32
@@ -106,9 +106,9 @@ define void @test_dmxvi8gerx4spp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
 ; CHECK-NEXT:    lxvp vsp34, 64(r3)
 ; CHECK-NEXT:    lxvp vsp36, 96(r3)
 ; CHECK-NEXT:    dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
-; CHECK-NEXT:    lxv v3, 0(r4)
-; CHECK-NEXT:    lxv vs0, 0(r5)
 ; CHECK-NEXT:    lxv v2, 16(r4)
+; CHECK-NEXT:    lxv vs0, 0(r5)
+; CHECK-NEXT:    lxv v3, 0(r4)
 ; CHECK-NEXT:    dmxvi8gerx4spp dmr0, vsp34, vs0
 ; CHECK-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
 ; CHECK-NEXT:    stxvp vsp34, 96(r6)
@@ -120,23 +120,23 @@ define void @test_dmxvi8gerx4spp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
 ;
 ; CHECK-BE-LABEL: test_dmxvi8gerx4spp:
 ; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:     lxvp vsp34, 96(r3)
-; CHECK-BE-NEXT:     lxvp vsp36, 64(r3)
-; CHECK-BE-NEXT:     dmxxinstfdmr512 wacc_hi0, vsp36, vsp34, 1
-; CHECK-BE-NEXT:     lxvp vsp34, 32(r3)
-; CHECK-BE-NEXT:     lxvp vsp36, 0(r3)
-; CHECK-BE-NEXT:     dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
-; CHECK-BE-NEXT:     lxv v3, 16(r4)
-; CHECK-BE-NEXT:     lxv vs0, 0(r5)
-; CHECK-BE-NEXT:     lxv v2, 0(r4)
-; CHECK-BE-NEXT:     dmxvi8gerx4spp dmr0, vsp34, vs0
-; CHECK-BE-NEXT:     dmxxextfdmr512 wacc_hi0, vsp34, vsp36, 1
-; CHECK-BE-NEXT:     stxvp vsp36, 96(r6)
-; CHECK-BE-NEXT:     stxvp vsp34, 64(r6)
-; CHECK-BE-NEXT:     dmxxextfdmr512 wacc0, vsp34, vsp36, 0
-; CHECK-BE-NEXT:     stxvp vsp36, 32(r6)
-; CHECK-BE-NEXT:     stxvp vsp34, 0(r6)
-; CHECK-BE-NEXT:     blr
+; CHECK-BE-NEXT:    lxvp vsp34, 96(r3)
+; CHECK-BE-NEXT:    lxvp vsp36, 64(r3)
+; CHECK-BE-NEXT:    dmxxinstfdmr512 wacc_hi0, vsp36, vsp34, 1
+; CHECK-BE-NEXT:    lxvp vsp34, 32(r3)
+; CHECK-BE-NEXT:    lxvp vsp36, 0(r3)
+; CHECK-BE-NEXT:    dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
+; CHECK-BE-NEXT:    lxv v2, 0(r4)
+; CHECK-BE-NEXT:    lxv vs0, 0(r5)
+; CHECK-BE-NEXT:    lxv v3, 16(r4)
+; CHECK-BE-NEXT:    dmxvi8gerx4spp dmr0, vsp34, vs0
+; CHECK-BE-NEXT:    dmxxextfdmr512 wacc_hi0, vsp34, vsp36, 1
+; CHECK-BE-NEXT:    stxvp vsp36, 96(r6)
+; CHECK-BE-NEXT:    stxvp vsp34, 64(r6)
+; CHECK-BE-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
+; CHECK-BE-NEXT:    stxvp vsp36, 32(r6)
+; CHECK-BE-NEXT:    stxvp vsp34, 0(r6)
+; CHECK-BE-NEXT:    blr
 entry:
   %v.dmr = load <1024 x i1>, ptr %vop, align 64
   %v1 = load <256 x i1>, ptr %vpp, align 32
@@ -157,9 +157,9 @@ define void @test_pmdmxvi8gerx4pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
 ; CHECK-NEXT:    lxvp vsp34, 64(r3)
 ; CHECK-NEXT:    lxvp vsp36, 96(r3)
 ; CHECK-NEXT:    dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
-; CHECK-NEXT:    lxv v3, 0(r4)
-; CHECK-NEXT:    lxv vs0, 0(r5)
 ; CHECK-NEXT:    lxv v2, 16(r4)
+; CHECK-NEXT:    lxv vs0, 0(r5)
+; CHECK-NEXT:    lxv v3, 0(r4)
 ; CHECK-NEXT:    pmdmxvi8gerx4pp dmr0, vsp34, vs0, 42, 7, 9
 ; CHECK-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
 ; CHECK-NEXT:    stxvp vsp34, 96(r6)
@@ -177,9 +177,9 @@ define void @test_pmdmxvi8gerx4pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
 ; CHECK-BE-NEXT:    lxvp vsp34, 32(r3)
 ; CHECK-BE-NEXT:    lxvp vsp36, 0(r3)
 ; CHECK-BE-NEXT:    dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
-; CHECK-BE-NEXT:    lxv v3, 16(r4)
-; CHECK-BE-NEXT:    lxv vs0, 0(r5)
 ; CHECK-BE-NEXT:    lxv v2, 0(r4)
+; CHECK-BE-NEXT:    lxv vs0, 0(r5)
+; CHECK-BE-NEXT:    lxv v3, 16(r4)
 ; CHECK-BE-NEXT:    pmdmxvi8gerx4pp dmr0, vsp34, vs0, 42, 7, 9
 ; CHECK-BE-NEXT:    dmxxextfdmr512 wacc_hi0, vsp34, vsp36, 1
 ; CHECK-BE-NEXT:    stxvp vsp36, 96(r6)
@@ -202,9 +202,9 @@ declare <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4(<256 x i1>, <16 x i8>, i32, i32,
 define void @test_pmdmxvi8gerx4(ptr %vpp, ptr %vcp, ptr %resp) {
 ; CHECK-LABEL: test_pmdmxvi8gerx4:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    lxv v3, 0(r3)
-; CHECK-NEXT:    lxv vs0, 0(r4)
 ; CHECK-NEXT:    lxv v2, 16(r3)
+; CHECK-NEXT:    lxv vs0, 0(r4)
+; CHECK-NEXT:    lxv v3, 0(r3)
 ; CHECK-NEXT:    pmdmxvi8gerx4 dmr0, vsp34, vs0, 55, 5, 10
 ; CHECK-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
 ; CHECK-NEXT:    stxvp vsp34, 96(r5)
@@ -216,17 +216,17 @@ define void @test_pmdmxvi8gerx4(ptr %vpp, ptr %vcp, ptr %resp) {
 ;
 ; CHECK-BE-LABEL: test_pmdmxvi8gerx4:
 ; CHECK-BE:       # %bb.0: # %entry
-; CHECK-BE-NEXT:     lxv v3, 16(r3)
-; CHECK-BE-NEXT:     lxv vs0, 0(r4)
-; CHECK-BE-NEXT:     lxv v2, 0(r3)
-; CHECK-BE-NEXT:     pmdmxvi8gerx4 dmr0, vsp34, vs0, 55, 5, 10
-; CHECK-BE-NEXT:     dmxxextfdmr512 wacc_hi0, vsp34, vsp36, 1
-; CHECK-BE-NEXT:     stxvp vsp36, 96(r5)
-; CHECK-BE-NEXT:     stxvp vsp34, 64(r5)
-; CHECK-BE-NEXT:     dmxxextfdmr512 wacc0, vsp34, vsp36, 0
-; CHECK-BE-NEXT:     stxvp vsp36, 32(r5)
-; CHECK-BE-NEXT:     stxvp vsp34, 0(r5)
-; CHECK-BE-NEXT:     blr
+; CHECK-BE-NEXT:    lxv v2, 0(r3)
+; CHECK-BE-NEXT:    lxv vs0, 0(r4)
+; CHECK-BE-NEXT:    lxv v3, 16(r3)
+; CHECK-BE-NEXT:    pmdmxvi8gerx4 dmr0, vsp34, vs0, 55, 5, 10
+; CHECK-BE-NEXT:    dmxxextfdmr512 wacc_hi0, vsp34, vsp36, 1
+; CHECK-BE-NEXT:    stxvp vsp36, 96(r5)
+; CHECK-BE-NEXT:    stxvp vsp34, 64(r5)
+; CHECK-BE-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
+; CHECK-BE-NEXT:    stxvp vsp36, 32(r5)
+; CHECK-BE-NEXT:    stxvp vsp34, 0(r5)
+; CHECK-BE-NEXT:    blr
 entry:
   %v1 = load <256 x i1>, ptr %vpp, align 32
   %v2 = load <16 x i8>, ptr %vcp, align 32
@@ -246,9 +246,9 @@ define dso_local void @test_pmdmxvi8gerx4spp(ptr %vop, ptr %vpp, ptr %vcp, ptr %
 ; CHECK-NEXT:    lxvp vsp34, 64(r3)
 ; CHECK-NEXT:    lxvp vsp36, 96(r3)
 ; CHECK-NEXT:    dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
-; CHECK-NEXT:    lxv v3, 0(r4)
-; CHECK-NEXT:    lxv vs0, 0(r5)
 ; CHECK-NEXT:    lxv v2, 16(r4)
+; CHECK-NEXT:    lxv vs0, 0(r5)
+; CHECK-NEXT:    lxv v3, 0(r4)
 ; CHECK-NEXT:    pmdmxvi8gerx4spp dmr0, vsp34, vs0, 100, 6, 12
 ; CHECK-NEXT:    dmxxextfdmr512 wacc0, vsp34, vsp36, 0
 ; CHECK-NEXT:    stxvp vsp34, 96(r6)
@@ -266,9 +266,9 @@ define dso_local void @test_pmdmxvi8gerx4spp(ptr %vop, ptr %vpp, ptr %vcp, ptr %
 ; CHECK-BE-NEXT:    lxvp vsp34, 32(r3)
 ; CHECK-BE-NEXT:    lxvp vsp36, 0(r3)
 ; CHECK-BE-NEXT:    dmxxinstfdmr512 wacc0, vsp36, vsp34, 0
-; CHECK-BE-NEXT:    lxv v3, 16(r4)
-; CHECK-BE-NEXT:    lxv vs0, 0(r5)
 ; CHECK-BE-NEXT:    lxv v2, 0(r4)
+; CHECK-BE-NEXT:    lxv vs0, 0(r5)
+; CHECK-BE-NEXT:    lxv v3, 16(r4)
 ; CHECK-BE-NEXT:    pmdmxvi8gerx4spp dmr0, vsp34, vs0, 100, 6, 12
 ; CHECK-BE-NEXT:    dmxxextfdmr512 wacc_hi0, vsp34, vsp36, 1
 ; CHECK-BE-NEXT:    stxvp vsp36, 96(r6)