@@ -20178,7 +20178,7 @@ bool ARMTargetLowering::targetShrinkDemandedConstant(
2017820178 if (DemandedBits.popcount() == 32)
2017920179 return false;
2018020180
20181- // Only optimize AND for now.
20181+ // Only optimize AND for now.
2018220182 if (Op.getOpcode() != ISD::AND)
2018320183 return false;
2018420184
@@ -20188,29 +20188,27 @@ bool ARMTargetLowering::targetShrinkDemandedConstant(
2018820188 return false;
2018920189
2019020190 unsigned Mask = C->getZExtValue();
20191-
20191+
2019220192 if (Mask == 0 || Mask == ~0U)
2019320193 return false;
20194-
20195- unsigned Mask = C->getZExtValue();
2019620194
2019720195 unsigned Demanded = DemandedBits.getZExtValue();
2019820196 unsigned ShrunkMask = Mask & Demanded;
2019920197 unsigned ExpandedMask = Mask | ~Demanded;
2020020198
20201- auto IsLegalMask = [ShrunkMask, ExpandedMask](unsigned Mask) -> bool {
20202- return (ShrunkMask & Mask) == ShrunkMask && (~ExpandedMask & Mask) == 0;
20203- };
20204- auto UseMask = [Mask, Op, VT, &TLO](unsigned NewMask) -> bool {
20205- if (NewMask == Mask)
20206- return true;
20207- SDLoc DL(Op);
20208- SDValue NewC = TLO.DAG.getConstant(NewMask, DL, VT);
20209- SDValue NewOp = TLO.DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), NewC);
20210- return TLO.CombineTo(Op, NewOp);
20211- };
20199+ auto IsLegalMask = [ShrunkMask, ExpandedMask](unsigned Mask) -> bool {
20200+ return (ShrunkMask & Mask) == ShrunkMask && (~ExpandedMask & Mask) == 0;
20201+ };
20202+ auto UseMask = [Mask, Op, VT, &TLO](unsigned NewMask) -> bool {
20203+ if (NewMask == Mask)
20204+ return true;
20205+ SDLoc DL(Op);
20206+ SDValue NewC = TLO.DAG.getConstant(NewMask, DL, VT);
20207+ SDValue NewOp = TLO.DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), NewC);
20208+ return TLO.CombineTo(Op, NewOp);
20209+ };
2021220210
20213- // If thumb, check for uxth and uxtb masks first and foremost.
20211+ // If thumb, check for uxth and uxtb masks first and foremost.
2021420212 if (Subtarget->isThumb1Only() && Subtarget->hasV6Ops()) {
2021520213 if (IsLegalMask(0xFF)) {
2021620214 ++NumOptimizedImms;
@@ -20227,17 +20225,23 @@ bool ARMTargetLowering::targetShrinkDemandedConstant(
2022720225 // result with zero.
2022820226 if (ShrunkMask == 0) {
2022920227 ++NumOptimizedImms;
20230- return UseMask(0 );
20228+ return UseMask(ShrunkMask );
2023120229 }
2023220230
2023320231 // If the mask is all ones, erase the AND. (Currently, the target-independent
2023420232 // code won't do this, so we have to do it explicitly to avoid an infinite
2023520233 // loop in obscure cases.)
2023620234 if (ExpandedMask == ~0U) {
2023720235 ++NumOptimizedImms;
20238- return TLO.CombineTo(Op, Op.getOperand(0) );
20236+ return UseMask(ExpandedMask );
2023920237 }
2024020238
20239+ // Don't optimize if it is legal already.
20240+ if (isLegalLogicalImmediate(Mask, Subtarget))
20241+ return false;
20242+
20243+ if (isLegalLogicalImmediate(~Mask, Subtarget))
20244+ return UseMask(Mask); // FIXME: Returning false causes infinite loop.
2024120245
2024220246 if (isLegalLogicalImmediate(ShrunkMask, Subtarget)) {
2024320247 ++NumOptimizedImms;
@@ -20249,13 +20253,6 @@ bool ARMTargetLowering::targetShrinkDemandedConstant(
2024920253 return UseMask(ExpandedMask);
2025020254 }
2025120255
20252- // Don't optimize if it is legal already.
20253- if (isLegalLogicalImmediate(Mask, Subtarget))
20254- return false;
20255-
20256- if (isLegalLogicalImmediate(~Mask, Subtarget))
20257- return UseMask(Mask); // FIXME: Returning false causes infinite loop.
20258-
2025920256 // Potential improvements:
2026020257 //
2026120258 // We could try to recognize lsls+lsrs or lsrs+lsls pairs here.
0 commit comments