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Fix according to heiher's reviews.
1 parent 6eb6a01 commit fd81493

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3 files changed

+23
-44
lines changed

3 files changed

+23
-44
lines changed

‎llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5036,13 +5036,13 @@ static SDValue performANDCombine(SDNode *N, SelectionDAG &DAG,
50365036
SDValue NewOperand;
50375037
MVT GRLenVT = Subtarget.getGRLenVT();
50385038

5039+
if (SDValue R = combineAndNotIntoVANDN(N, DL, DAG))
5040+
return R;
5041+
50395042
// BSTRPICK requires the 32S feature.
50405043
if (!Subtarget.has32S())
50415044
return SDValue();
50425045

5043-
if (SDValue R = combineAndNotIntoVANDN(N, DL, DAG))
5044-
return R;
5045-
50465046
// Op's second operand must be a shifted mask.
50475047
if (!(CN = dyn_cast<ConstantSDNode>(SecondOperand)) ||
50485048
!isShiftedMask_64(CN->getZExtValue(), SMIdx, SMLen))

‎llvm/test/CodeGen/LoongArch/lasx/and-not-combine.ll‎

Lines changed: 12 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -318,10 +318,9 @@ define void @and_or_not_combine_v32i8(ptr %pa, ptr %pb, ptr %pv, ptr %dst) nounw
318318
; CHECK-NEXT: xvld $xr1, $a2, 0
319319
; CHECK-NEXT: xvld $xr2, $a1, 0
320320
; CHECK-NEXT: xvseq.b $xr0, $xr1, $xr0
321-
; CHECK-NEXT: xvxori.b $xr0, $xr0, 255
322321
; CHECK-NEXT: xvseq.b $xr1, $xr1, $xr2
323-
; CHECK-NEXT: xvorn.v $xr0, $xr0, $xr1
324-
; CHECK-NEXT: xvandi.b $xr0, $xr0, 4
322+
; CHECK-NEXT: xvand.v $xr0, $xr0, $xr1
323+
; CHECK-NEXT: xvnori.b $xr0, $xr0, 251
325324
; CHECK-NEXT: xvst $xr0, $a3, 0
326325
; CHECK-NEXT: ret
327326
%a = load <32 x i8>, ptr %pa
@@ -343,12 +342,10 @@ define void @and_or_not_combine_v16i16(ptr %pa, ptr %pb, ptr %pv, ptr %dst) noun
343342
; CHECK-NEXT: xvld $xr1, $a2, 0
344343
; CHECK-NEXT: xvld $xr2, $a1, 0
345344
; CHECK-NEXT: xvseq.h $xr0, $xr1, $xr0
346-
; CHECK-NEXT: xvrepli.b $xr3, -1
347-
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr3
348345
; CHECK-NEXT: xvseq.h $xr1, $xr1, $xr2
349-
; CHECK-NEXT: xvorn.v $xr0, $xr0, $xr1
350-
; CHECK-NEXT: xvrepli.h $xr1, 4
351346
; CHECK-NEXT: xvand.v $xr0, $xr0, $xr1
347+
; CHECK-NEXT: xvrepli.h $xr1, 4
348+
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
352349
; CHECK-NEXT: xvst $xr0, $a3, 0
353350
; CHECK-NEXT: ret
354351
%a = load <16 x i16>, ptr %pa
@@ -370,12 +367,10 @@ define void @and_or_not_combine_v8i32(ptr %pa, ptr %pb, ptr %pv, ptr %dst) nounw
370367
; CHECK-NEXT: xvld $xr1, $a2, 0
371368
; CHECK-NEXT: xvld $xr2, $a1, 0
372369
; CHECK-NEXT: xvseq.w $xr0, $xr1, $xr0
373-
; CHECK-NEXT: xvrepli.b $xr3, -1
374-
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr3
375370
; CHECK-NEXT: xvseq.w $xr1, $xr1, $xr2
376-
; CHECK-NEXT: xvorn.v $xr0, $xr0, $xr1
377-
; CHECK-NEXT: xvrepli.w $xr1, 4
378371
; CHECK-NEXT: xvand.v $xr0, $xr0, $xr1
372+
; CHECK-NEXT: xvrepli.w $xr1, 4
373+
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
379374
; CHECK-NEXT: xvst $xr0, $a3, 0
380375
; CHECK-NEXT: ret
381376
%a = load <8 x i32>, ptr %pa
@@ -397,12 +392,10 @@ define void @and_or_not_combine_v4i64(ptr %pa, ptr %pb, ptr %pv, ptr %dst) nounw
397392
; CHECK-NEXT: xvld $xr1, $a2, 0
398393
; CHECK-NEXT: xvld $xr2, $a1, 0
399394
; CHECK-NEXT: xvseq.d $xr0, $xr1, $xr0
400-
; CHECK-NEXT: xvrepli.b $xr3, -1
401-
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr3
402395
; CHECK-NEXT: xvseq.d $xr1, $xr1, $xr2
403-
; CHECK-NEXT: xvorn.v $xr0, $xr0, $xr1
404-
; CHECK-NEXT: xvrepli.d $xr1, 4
405396
; CHECK-NEXT: xvand.v $xr0, $xr0, $xr1
397+
; CHECK-NEXT: xvrepli.d $xr1, 4
398+
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
406399
; CHECK-NEXT: xvst $xr0, $a3, 0
407400
; CHECK-NEXT: ret
408401
%a = load <4 x i64>, ptr %pa
@@ -421,9 +414,8 @@ define void @and_extract_subvector_not_combine_v32i8(ptr %pa, ptr %dst) nounwind
421414
; CHECK-LABEL: and_extract_subvector_not_combine_v32i8:
422415
; CHECK: # %bb.0:
423416
; CHECK-NEXT: xvld $xr0, $a0, 0
424-
; CHECK-NEXT: xvxori.b $xr0, $xr0, 255
425417
; CHECK-NEXT: xvpermi.q $xr0, $xr0, 1
426-
; CHECK-NEXT: vandi.b $vr0, $vr0, 4
418+
; CHECK-NEXT: vnori.b $vr0, $vr0, 251
427419
; CHECK-NEXT: vst $vr0, $a1, 0
428420
; CHECK-NEXT: ret
429421
%a = load volatile <32 x i8>, ptr %pa
@@ -440,11 +432,9 @@ define void @and_extract_subvector_not_combine_v16i16(ptr %pa, ptr %dst) nounwin
440432
; CHECK-LABEL: and_extract_subvector_not_combine_v16i16:
441433
; CHECK: # %bb.0:
442434
; CHECK-NEXT: xvld $xr0, $a0, 0
443-
; CHECK-NEXT: xvrepli.b $xr1, -1
444-
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
445435
; CHECK-NEXT: xvpermi.q $xr0, $xr0, 1
446436
; CHECK-NEXT: vrepli.h $vr1, 4
447-
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
437+
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
448438
; CHECK-NEXT: vst $vr0, $a1, 0
449439
; CHECK-NEXT: ret
450440
%a = load volatile <16 x i16>, ptr %pa
@@ -460,11 +450,9 @@ define void @and_extract_subvector_not_combine_v8i32(ptr %pa, ptr %dst) nounwind
460450
; CHECK-LABEL: and_extract_subvector_not_combine_v8i32:
461451
; CHECK: # %bb.0:
462452
; CHECK-NEXT: xvld $xr0, $a0, 0
463-
; CHECK-NEXT: xvrepli.b $xr1, -1
464-
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
465453
; CHECK-NEXT: xvpermi.q $xr0, $xr0, 1
466454
; CHECK-NEXT: vrepli.w $vr1, 4
467-
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
455+
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
468456
; CHECK-NEXT: vst $vr0, $a1, 0
469457
; CHECK-NEXT: ret
470458
%a = load volatile <8 x i32>, ptr %pa
@@ -479,11 +467,9 @@ define void @and_extract_subvector_not_combine_v4i64(ptr %pa, ptr %dst) nounwind
479467
; CHECK-LABEL: and_extract_subvector_not_combine_v4i64:
480468
; CHECK: # %bb.0:
481469
; CHECK-NEXT: xvld $xr0, $a0, 0
482-
; CHECK-NEXT: xvrepli.b $xr1, -1
483-
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
484470
; CHECK-NEXT: xvpermi.q $xr0, $xr0, 1
485471
; CHECK-NEXT: vrepli.d $vr1, 4
486-
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
472+
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
487473
; CHECK-NEXT: vst $vr0, $a1, 0
488474
; CHECK-NEXT: ret
489475
%a = load volatile <4 x i64>, ptr %pa

‎llvm/test/CodeGen/LoongArch/lsx/and-not-combine.ll‎

Lines changed: 8 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -318,10 +318,9 @@ define void @and_or_not_combine_v16i8(ptr %pa, ptr %pb, ptr %pv, ptr %dst) nounw
318318
; CHECK-NEXT: vld $vr1, $a2, 0
319319
; CHECK-NEXT: vld $vr2, $a1, 0
320320
; CHECK-NEXT: vseq.b $vr0, $vr1, $vr0
321-
; CHECK-NEXT: vxori.b $vr0, $vr0, 255
322321
; CHECK-NEXT: vseq.b $vr1, $vr1, $vr2
323-
; CHECK-NEXT: vorn.v $vr0, $vr0, $vr1
324-
; CHECK-NEXT: vandi.b $vr0, $vr0, 4
322+
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
323+
; CHECK-NEXT: vnori.b $vr0, $vr0, 251
325324
; CHECK-NEXT: vst $vr0, $a3, 0
326325
; CHECK-NEXT: ret
327326
%a = load <16 x i8>, ptr %pa
@@ -343,12 +342,10 @@ define void @and_or_not_combine_v8i16(ptr %pa, ptr %pb, ptr %pv, ptr %dst) nounw
343342
; CHECK-NEXT: vld $vr1, $a2, 0
344343
; CHECK-NEXT: vld $vr2, $a1, 0
345344
; CHECK-NEXT: vseq.h $vr0, $vr1, $vr0
346-
; CHECK-NEXT: vrepli.b $vr3, -1
347-
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr3
348345
; CHECK-NEXT: vseq.h $vr1, $vr1, $vr2
349-
; CHECK-NEXT: vorn.v $vr0, $vr0, $vr1
350-
; CHECK-NEXT: vrepli.h $vr1, 4
351346
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
347+
; CHECK-NEXT: vrepli.h $vr1, 4
348+
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
352349
; CHECK-NEXT: vst $vr0, $a3, 0
353350
; CHECK-NEXT: ret
354351
%a = load <8 x i16>, ptr %pa
@@ -370,12 +367,10 @@ define void @and_or_not_combine_v4i32(ptr %pa, ptr %pb, ptr %pv, ptr %dst) nounw
370367
; CHECK-NEXT: vld $vr1, $a2, 0
371368
; CHECK-NEXT: vld $vr2, $a1, 0
372369
; CHECK-NEXT: vseq.w $vr0, $vr1, $vr0
373-
; CHECK-NEXT: vrepli.b $vr3, -1
374-
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr3
375370
; CHECK-NEXT: vseq.w $vr1, $vr1, $vr2
376-
; CHECK-NEXT: vorn.v $vr0, $vr0, $vr1
377-
; CHECK-NEXT: vrepli.w $vr1, 4
378371
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
372+
; CHECK-NEXT: vrepli.w $vr1, 4
373+
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
379374
; CHECK-NEXT: vst $vr0, $a3, 0
380375
; CHECK-NEXT: ret
381376
%a = load <4 x i32>, ptr %pa
@@ -397,12 +392,10 @@ define void @and_or_not_combine_v2i64(ptr %pa, ptr %pb, ptr %pv, ptr %dst) nounw
397392
; CHECK-NEXT: vld $vr1, $a2, 0
398393
; CHECK-NEXT: vld $vr2, $a1, 0
399394
; CHECK-NEXT: vseq.d $vr0, $vr1, $vr0
400-
; CHECK-NEXT: vrepli.b $vr3, -1
401-
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr3
402395
; CHECK-NEXT: vseq.d $vr1, $vr1, $vr2
403-
; CHECK-NEXT: vorn.v $vr0, $vr0, $vr1
404-
; CHECK-NEXT: vrepli.d $vr1, 4
405396
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
397+
; CHECK-NEXT: vrepli.d $vr1, 4
398+
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
406399
; CHECK-NEXT: vst $vr0, $a3, 0
407400
; CHECK-NEXT: ret
408401
%a = load <2 x i64>, ptr %pa

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